In this article we look at what an Instruction Set Architecture (ISA) is and what is the difference between an ‘ISA’ and Microarchitecture. An ISA is defined as the design of a computer from the Programmer’s Perspective.
This basically means that an ISA describes the design of a Computer in terms of the basic operations it must support. The ISA is not concerned with the implementation specific details of a computer. It is only concerned with the set or collection of basic operations the computer must support. For example the AMD Athlon and the Core 2 Duo processors have entirely different implementations but they support more or less the same set of basic operations as defined in the x86 Instruction Set.
Let us try to understand the Objectives of an ISA by taking the example of the MIPS ISA. MIPS is one of the most widely used ISAs in education due to its simplicity.
- The ISA defines the types of instructions to be supported by the processor.
Based on the type of operations they perform MIPS Instructions are classified into 3 types:
- Arithmetic/Logic Instructions:
These Instructions perform various Arithmetic & Logical operations on one or more operands.
- Data Transfer Instructions:
These instructions are responsible for the transfer of instructions from memory to the processor registers and vice versa.
- Branch and Jump Instructions:
These instructions are responsible for breaking the sequential flow of instructions and jumping to instructions at various other locations, this is necessary for the implementation of functions and conditional statements.
- Arithmetic/Logic Instructions:
- The ISA defines the maximum length of each type of instruction.
Since the MIPS is a 32 bit ISA, each instruction must be accomodated within 32 bits.
- The ISA defines the Instruction Format of each type of instruction.
The Instruction Format determines how the entire instruction is encoded within 32 bits
There are 3 types of Instruction Formats in the MIPS ISA:
- R-Instruction Format
- I-Instruction Format
- J-Instruction Format
Each of the above Instruction Formats have different instruction encoding schemes, and hence need to be interpreted differently by the processor.
If we look at the Abstraction Hierarchy:
Figure – The Abstraction Hierarchy
We note that the Microarchitectural level lies just below the ISA level and hence is concerned with the implementation of the basic operations to be supported by the Computer as defined by the ISA. Therefore we can say that the AMD Athlon and Core 2 Duo processors are based on the same ISA but have different microarchitectures with different performance and efficiencies.
Now one may ask the need to distinguish between Microarchitecture and ISA ?
The answer to this lies in the need to standardize and maintain the compatibility of programs across different hardware implementations based on the same ISA. Making different machines compatible with the same set of basic instructions (The ISA) allows the same program to run smoothly on many different machines thereby making it easier for the programmers to document and maintain code for many different machines simulteneously and efficiently.
This Flexibility is the reason we first define an ISA and then design different microarchitectures complying to this ISA for implementing the machine. The design of a ISA is one of the major tasks in the study of Computer Architecture.
|Instruction Set Architecture||Microarchitecture|
|The ISA is responsible for defining the set of instructions to be supported by the processor. For example, some of the instructions defined by the ARMv7 ISA are given below.||The Microarchitecture is more concerned with the lower level implementation of how the instructions are going to be executed and deals with concepts like Instruction Pipelining, Branch Prediction, Out of Order Execution.|
|The Branch of Computer Architecture is more inclined towards the Analysis and Design of Instruction Set Architecture.For Example, Intel developed the x86 architecture, ARM developed the ARM architecture, & AMD developed the amd64 architecture. The RISC-V ISA developed by UC Berkeley is an example of a Open Source ISA.||On the other hand the Branch of Computer Organization is concerned with the implementation of a particular ISA deals with various hardware implementation techniques, i.e. is the Microarchitecture level. For Example, ARM licenses other companies like Qualcomm, Apple for using it ARM ISA, but each of these companies have their own implementations of this ISA thereby making them different in performance and power efficiency. The Krait cores developed by Qualcomm have a different microarchitecture and the Apple A-series processors have a different microarchitecture.|
The x86 was developed by Intel, but we see that almost every year Intel comes up with a new generation of i-series processors. The x86 architecture on which most of the Intel Processors are based essentially remains the same across all these generations but, where they differ is in the underlying Microarchitecture. They differ in their implementation, and hence are claimed to have improved Performance. These various Microarchitectures developed by Intel are codenamed as ‘Nehalem’, ‘Sandybridge’, ‘Ivybridge’ and so on.
Therefore in conclusion, we can say that different machines may be based on the same ISA, but have different Microarchitectures.
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- Computer Organization | Instruction Formats (Zero, One, Two and Three Address Instruction)
- Difference between 3-address instruction and 1-address instruction
- Difference between 3-address instruction and 0-address instruction
- Instruction Set used in simplified instructional Computer (SIC)
- Instruction Set used in SIC/XE
- Arithmetic Pipeline and Instruction Pipeline
- Difference between 3-address instruction and 2-address instructions
- Difference between 2-address instruction and 1-address instructions
- Computer Organization | Different Instruction Cycles
- Instruction cycle in 8085 microprocessor
- 8086 program to transfer a block of bytes by using string instruction
- Computer Organization | Problem Solving on Instruction Format
- Timing diagram of MVI instruction
- Vector Instruction Format in Vector Processors
- Vector instruction types
- Instruction Word Size in Microprocessor
- Timing diagram of MOV Instruction in Microprocessor
- Essential Registers for Instruction Execution
- Computer Organization and Architecture | Pipelining | Set 1 (Execution, Stages and Throughput)
- Computer Organization and Architecture | Pipelining | Set 3 (Types and Stalling)
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