PPI 8255 is a general purpose programmable I/O device designed to interface the CPU with its outside world such as ADC, DAC, keyboard etc. We can program it according to the given condition. It can be used with almost any microprocessor. It consists of three 8-bit bidirectional I/O ports i.e. PORT A, PORT B and PORT C. We can assign different ports as input or output functions. Block diagram – It consists of 40 pins and operates in +5V regulated power supply. Port C is further divided into two 4-bit ports i.e. port C lower and port C upper and port C can work in either BSR (bit set rest) mode or in mode 0 of input-output mode of 8255. Port B can work in either mode 0 or in mode 1 of input-output mode. Port A can work either in mode 0, mode 1 or mode 2 of input-output mode. It has two control groups, control group A and control group B. Control group A consist of port A and port C upper. Control group B consists of port C lower and port B. Depending upon the value if CS’, A1 and A0 we can select different ports in different modes as input-output function or BSR. This is done by writing a suitable word in control register (control word D0-D7).
Pin diagram –
- PA0 – PA7 – Pins of port A
- PB0 – PB7 – Pins of port B
- PC0 – PC7 – Pins of port C
- D0 – D7 – Data pins for the transfer of data
- RESET – Reset input
- RD’ – Read input
- WR’ – Write input
- CS’ – Chip select
- A1 and A0 – Address pins
Operating modes –
- Bit set reset (BSR) mode – If MSB of control word (D7) is 0, PPI works in BSR mode. In this mode only port C bits are used for set or reset.
- Input-Output mode – If MSB of control word (D7) is 1, PPI works in input-output mode. This is further divided into three modes:
- Mode 0 –In this mode all the three ports (port A, B, C) can work as simple input function or simple output function. In this mode there is no interrupt handling capacity.
- Mode 1 – Handshake I/O mode or strobed I/O mode. In this mode either port A or port B can work as simple input port or simple output port, and port C bits are used for handshake signals before actual data transmission. It has interrupt handling capacity and input and output are latched. Example: A CPU wants to transfer data to a printer. In this case since speed of processor is very fast as compared to relatively slow printer, so before actual data transfer it will send handshake signals to the printer for synchronization of the speed of the CPU and the peripherals.
- Mode 2 – Bi-directional data bus mode. In this mode only port A works, and port B can work either in mode 0 or mode 1. 6 bits port C are used as handshake signals. It also has interrupt handling capacity.
Versatility: The PPI 8255 can be programmed to operate in a variety of modes, which makes it a versatile component in many different systems. It provides three 8-bit ports that can be configured as input or output ports, and supports multiple modes of operation for each port.
Ease of use: The PPI 8255 is relatively easy to use and program, even for novice programmers. The control register of the PPI can be programmed using simple commands, which makes it easy to interface with other devices.
Compatibility: The PPI 8255 is widely used and has been around for many years, which means that it is compatible with a wide range of devices and software.
Low cost: The PPI 8255 is a relatively low-cost component, which makes it an affordable option for many different applications.
Limited functionality: While the PPI 8255 is versatile, it has limited functionality compared to newer I/O interface components. It is not capable of high-speed data transfer and has limited memory capacity.
Limited number of ports: The PPI 8255 provides only three 8-bit ports, which may not be sufficient for some applications that require more I/O ports.
Limited resolution: The PPI 8255 provides only 8 bits of resolution for each port, which may not be sufficient for some applications that require higher resolution.
Obsolete technology: While the PPI 8255 is still used in some applications, it is considered an older technology and is being replaced by newer, more advanced I/O interface components.
Share your thoughts in the comments
Please Login to comment...