The output 0 and 1 level for TTL Logic family is approximately
(A) 0.1 and 5V
(B) 0.6 and 3.5 V
(C) 0.9 and 1.75 V
(D) -1.75 and 0.9 V


Answer: (B)

Explanation: TTL high signal would be 5.00 volts exactly, and a TTL low signal 0.00 volts exactly. However, real TTL gate circuits cannot output such perfect voltage levels, and are designed to accept “high” and “low” signals deviating substantially from these ideal values.

Correct option is (B).

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