Consider the following instruction set:
1: Add: r₀ r₁ r₂
2: Sub: r₃ r₀ r₄
3: Mul: r₄ r₅ r₆
4: Div: r₃ r₇ r₈
In order execution creates unnecessary stalls, to avoid these stalls instruction rescheduling takes place. I.e. 1 – 3 – 4 – 2 but it creates ______ dependency between 3 and 2 and ______ dependency between 2 and 4.

(A) data dependency, anti-dependency
(B) anti data dependency, o/p data dependency
(C) o/p data dependency, anti data deoendency
(D) Anti data dependency, data dependency.


Answer: (B)

Explanation: When instruction 1 – 2 -3 – 4 executed then 2nd instruction is dependent on 1st for r0 and will create stalls. These stalls are also shared by 3rd and 4th instruction even they are independent. To handle this insert independent instruction in place of the stall. So it will cause the reorder execution 1 – 3 – 4 – 2.
Instruction 3 modifies the data register r₄ before 2 reads it, therefore, instruction 2 gets the new value[data loss] This is called Anti data dependency.
Instruction 4 will modify the register r₃ before instruction 2 write it, therefore, destination is incorrectly updated with a hold value[data loss] is called o/p dependency.
So ,option (B) is correct.


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