An 8KB direct-mapped write-back cache is organized as multiple blocks, each of size 32-bytes. The processor generates 32-bit addresses. The cache controller maintains the tag information for each cache block comprising of the following.
1 Valid bit
1 Modified bit
As many bits as the minimum needed to identify the memory block mapped in the cache. What is the total size of memory needed at the cache controller to store meta-data (tags) for the cache?
(A) 4864 bits
(B) 6144 bits
(C) 6656 bits
(D) 5376 bits


Answer: (D)

Explanation:

   Cache size = 8 KB
   Block size = 32 bytes
   Number of cache lines = Cache size / Block size = (8 × 1024 bytes)/32 = 256

   

   total bits required to store meta-data of 1 line = 1 + 1 + 19 = 21 bits
   total memory required = 21 × 256 = 5376 bits

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