Prerequisite – Flip-flop
1. JK Flip-Flop:
JK Flip-Flip is basically a gated SR flip-flop which has an additional input that is clock input. It prevents the invalid output that may be obtained when both the inputs are 1.
2. D Flip-Flop:
D Flip-Flop is a modified SR flip-flop which has an additional inverter. It prevents the inputs from becoming the same value.
Conversion of J-K Flip-Flop into D Flip-Flop:
We construct the characteristic table of D flip-flop and excitation table of JK flip-flop.
Using the K-map we find the boolean expression of J and K in terms of D.
J = D K = D'
We construct the circuit diagram of the conversion of JK flip-flop into D flip-flop.
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