1. Single Cycle Datapaths :
Single Datapaths is equivalent to the original single-cycle datapath The data memory has only one Address input. The actual memory operation can be determined from the MemRead and MemWrite control signals. There are separate memories for instructions and data There are 2 adders for PC-based computations and one ALU. The control signals are the same.
2. Pipeline Datapaths :
The goal of pipelining is to allow multiple instructions to be executed at the same time. We may need to perform several operations in a cycle. Increment the PC and add registers at the same time. Fetch one instruction while another one reads or writes data.
Like the single-cycle datapath, a pipeline processor needs to duplicate hardware elements that are needed in the same clock cycle.
Differences between Single Datapath and Pilpeline Datapath :
|S.No.||Single Cycle Datapath||Pipleline Datapath|
|1||Instructions are not subdivided||Instructions are divided into one per stage|
|2||Clock cycles are long enough for the lowest instruction||Clock cycles are short but long enough for the lowest instruction|
|3||There are only 1 instruction that can be executed at the same time.||There are as many instructions as pipeline stages|
|4||There is 1 cycle per instruction, i, e., CPI = 1||There is a fixed number of clock cycles per instruction, one for each pipeline stage, i.e., CPI = k|
|5||Control unit generates signals for the entire instruction.||Control unit generates signals for the entire instruction; these signals are propagated from one pipeline stage to another via the pipeline registers.|
|6||There is duplicate hardware, because we can use a functional unit for at most one subtask per instruction.||There is duplicate hardware, so that there are no restrictions on which instructions can be in the pipeline simultaneously.|
|7||Extra registers are not required.||Extra registers are requeired to provide the results of one pipeline stage to the next pipeline stage.|
|8||Performance is baseline.||Performance is moderately faster to significantly faster than a single cycle.|
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