You may be speculative however the central processor is programmed. It contains a special register — the instruction register — whose bit pattern determines what the central processor unit can do. Once that action has been completed, the bit pattern within the instruction register may be modified, and also the central processor unit can perform the operation nominative by this next bit pattern.
Since directions are simply bit patterns, they will be kept in memory. The instruction pointer register continuously has the memory address of (points to) the next instruction to be executed. so as for the management unit to execute this instruction, it’s derived into the instruction register. the case is as follows:
- A sequence of instructions is stored in memory.
- The memory address wherever the first instruction is found is copied to the instruction pointer.
- The CPU sends the address within the instruction pointer to memory on the address bus.
- The CPU sends a “read” signal to the control bus.
- Memory responds by sending a copy of the state of the bits at that memory location on the
data bus, that the CPU then copies into its instruction register.
- The instruction pointer is automatically incremented to contain the address of the next
instruction in memory.
- The CPU executes the instruction within the instruction register.
- Go to step 3
Steps 3, 4, and 5 are called an instruction fetch. Notice that steps 3 – 8 constitute a cycle, the instruction execution cycle. It is shown graphically below.
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