Performance of 2-level Paging

INTRODUCTION:

Two-level paging is a hierarchical paging technique that divides the virtual address space into two levels of page tables: the top-level page table and the second-level page table. The top-level page table maps virtual memory addresses to second-level page tables, while the second-level page tables map virtual memory addresses to physical memory addresses.

The performance of two-level paging depends on several factors, including:

• TLB hit rate: The Translation Lookaside Buffer (TLB) is used to cache page table entries and speed up the virtual to physical memory mapping process. A high TLB hit rate can improve the performance of two-level paging.
• Page table size: The size of the page tables affects the performance of two-level paging. A large page table size can lead to longer access times, while a small page table size can lead to increased page faults.
• Page size: The size of the pages used in two-level paging affects the performance of the system. Larger page sizes can lead to improved memory utilization, while smaller page sizes can lead to increased fragmentation.
• Disk I/O: Two-level paging requires disk I/O to swap pages in and out of physical memory, so disk I/O performance can significantly impact the overall performance of two-level paging.
  In general, two-level paging can provide improved memory utilization and system performance compared to other paging techniques, especially when the TLB hit rate is high and the page table size is optimized. However, it can also add complexity to the memory management process, requiring specialized algorithms and data structures to manage the two levels of page tables.
  

In this article, we are going to discuss the performance of 2-level paging and also will discuss how we can evaluate an expression for evaluating the performance of 2-level paging. Let’s discuss one by one.

Pre-requisite: Paging in OS | 2-level Paging And Multi-level Paging

Performance of 2-level Paging :

Let’s consider the main memory access time is M. Page tables are stored in the main memory then the formula for effective memory access time.

Effective Memory Access Time(E.M.A.T) = 3M

Features :

• The TLB is added to improve the performance of paging.
• The TLB contains frequently referred page numbers and corresponding frame numbers.

Evaluating Expression for Performance of 2-level Paging :

Let’s consider the TLB access time is C. And TLB hit ratio is x then the formula for E.M.A.T as follows.   

E.M.A.T = x(C+M) + (1 - x)(C+3M)
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                        N-level Paging
E.M.A.T = x(C+M) + (1 - x)(C+ (N+1)M)

Important points for Performance of 2-level Paging :

1. In multi-level paging when paging is applied on page table. The last page table which we get is called the 1st level page table.
2. In the multi-level paging when multiple paging is applied on the page table the first level page table entry contains the base address of the 2nd level page table, The 2nd level page table entry contains the base address of the 3rd level page table, and so on.
3. In the multilevel paging when paging is applied on the page table then whatever may be the level of paging all the page table (page of page table) will be stored in the main memory.
4. In multilevel paging when paging is applied on the page table then whatever may be the level of paging all the page table entry contains frame number.
5. If the page size is not mentioned in the problem then generally page size will be the same in all the places(Levels).

Advantages of Two-level Paging:

• Large virtual address space: Two-level paging enables support for large virtual address spaces by dividing the virtual address space into multiple smaller page tables.
• Improved memory utilization: By using larger page sizes, two-level paging can lead to improved memory utilization, reducing the amount of unused memory.
• Reduced fragmentation: Two-level paging reduces fragmentation by allocating larger blocks of contiguous physical memory to applications.
• Increased performance: Two-level paging can improve system performance by reducing the number of page table accesses required to map virtual memory addresses to physical memory addresses.

Disadvantages of Two-level Paging:

1. Increased complexity: Two-level paging adds additional complexity to the memory management process, requiring specialized algorithms and data structures to manage the two levels of page tables.
2. Increased overhead: Two-level paging introduces additional overhead due to the additional level of indirection required to map virtual memory addresses to physical memory addresses.
3. Increased memory usage: Two-level paging requires additional memory to store the top-level and second-level page tables, which can increase memory usage.
4. Increased page fault rate: Two-level paging can lead to an increased page fault rate due to the additional level of indirection and the larger page table size.

REFERENCE:

A classic textbook that covers two-level paging in detail is “Computer Architecture: A Quantitative Approach” by John L. Hennessy and David A. Patterson. This book provides a comprehensive overview of computer architecture, including a detailed discussion of memory management techniques like two-level paging. Another good reference is “Operating System Concepts” by Abraham Silberschatz, Peter B. Galvin, and Greg Gagne, which covers the fundamental concepts of operating systems and includes a discussion of two-level paging and its role in memory management.