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GATE | GATE CS 1999 | Question 66

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  • Last Updated : 10 Oct, 2017

[5 Marks question]

Design a 2K x 8 (2048 locations, each 8 bit wide) memory system mapped at addresses (1000)16 to (17FF)16 for the 8085 processor using four 1K x 4 memory chips. Each of these chips has the following signal pins:

q20


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