Crossbar Switch system contains of a number of crosspoints that are kept at intersections among memory module and processor buses paths. In each crosspoint, the small square represents a switch which obtains the path from a processor to a memory module. Each switch point has control logic to set up the transfer path among a memory and processor. It calculates the address which is placed in the bus to obtain whether its specific module is being addressed. In addition, it eliminates multiple requests for access to the same memory module on a predetermined priority basis.
Functional design of a crossbar switch connected to one memory module is shown in figure. The circuit contains multiplexers which choose the data, address, and control from one CPU for communication with the memory module. Arbitration logic established priority levels to select one CPU when two or more CPUs attempt to access the same memory. The multiplexers can be handled by the binary code which is produced by a priority encoder within the arbitration logic.
A crossbar switch system permits simultaneous transfers from all memory modules because there is a separate path associated with each module. Thus, the hardware needed to implement the switch may become quite large and complex.
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