UGC-NET | UGC-NET CS 2017 Nov – III | Question 6

A micro-instruction format has micro-ops field which is divided into three subfields F1, F2, F3 each having seven distinct micro-operations, condition field CD for four status bits, branch field BR having four options used in conjunction with address field ADF. The address space is of 128 memory locations. The size of micro-instruction is:

(A)

17

(B)

20

(C)

24

(D)

32

Answer: (B)

Explanation:

Microprocessor instruction format, which is divided into three subfields F1, F2, F3 each having seven distinct micro-operations, condition field CD for four status bits, branch field BR having four options used in conjunction with address field ADF. The address space is of 128 memory locations.ie: 

F1,F2,F3 each having seven distinct micro-operation. So, 3 bits are required for each. 
Condition field has four status bits, it needs 4 bits for four different conditions. 
Branch field have four option so, it needs 2 bits for four option. 
Now there are 128 different memory location, So, there 7 bits are required for 128 different location. But BR field is used in conjunction with the address field therefore the size of the address field is 7 – 2  = 5.

Instruction Field:

Total bits are 20. 
So, option (B) is correct. 

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