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GATE | GATE-CS-2007 | Question 85

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The control signal functions of a 4-bit binary counter are given below (where X is “don’t care”) The counter is connected as follows: \"GATECS2007Q36\" 
The counter is connected as follows: 
\"GATECS2007Q36\" Assume that the counter and gate delays are negligible. If the counter starts at 0, then it cycles through the following sequence:


0, 3, 4


0, 3, 4, 5


0, 1, 2, 3, 4


0, 1, 2, 3, 4, 5

Answer: (C)


Initially A1 A2 A3 A4 =0000 Clr=A1 and A3 So when A1 and A3 both are 1 it again goes to 0000 Hence 0000(init.) -> 0001(A1 and A3=0)->0010 (A1 and A3=0) -> 0011(A1 and A3=0) -> 0100 (A1 and A3=1)[ clear condition satisfied] ->0000(init.) so it goes through 0->1->2->3->4 Ans is (C) part. 

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Last Updated : 29 Sep, 2021
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