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GATE | GATE-CS-2004 | Question 47

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Consider a system with a two-level paging scheme in which a regular memory access takes 150 nanoseconds, and servicing a page fault takes 8 milliseconds. An average instruction takes 100 nanoseconds of CPU time, and two memory accesses. The TLB hit ratio is 90%, and the page fault rate is one in every 10,000 instructions. What is the effective average instruction execution time?
(A) 645 nanoseconds
(B) 1050 nanoseconds
(C) 1215 nanoseconds
(D) 1230 nanoseconds

Answer: (D)

Explanation: Please note that page fault rate is given one page fault per 10,000 instructions. Since there are two memory accesses per instruction, so we need double address translation time for average instruction execution time. Also, there are 2 page table accessed if TLB miss occurred. TLB access assumed as 0.


Average Instruction execution time = Average CPU execution time + Average time for getting data(instruction operands from memory for each instruction)

= Average CPU execution time + Average address translation time for each instruction + Average memory fetch time for each instruction + Average page fault time for each instruction

= 100 + 2×(0.9×(0)+0.1×(2×150)) + 2×150 + 1 /10000 × 8 × 106

= 100 + 60 + 300 + 800

= 1260 ns

So, none option is correct.

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Last Updated : 18 Jan, 2018
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