ISRO | ISRO CS 2017 | Question 41
For a pipelines CPU with a single ALU, consider the following:
A. The j + 1st instruction uses the result of jth instruction as an operand
B. Conditional jump instruction
C. jth and j + 1st instructions require ALU at the same time
Which one of the above causes a hazard?
(A) A and B only
(B) B and C only
(C) B only
(D) A , B and C
Explanation: Refer: GATE-CS-2003 | Question 10
Correct option is (D)
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