GATE | GATE-CS-2016 (Set 2) | Question 42
The width of the physical address on a machine is 40 bits. The width of the tag field in a 512 KB 8-way set associative cache is ____________ bits
Explanation: An easy approach would be we know that physical address is 40 bytes
We know cache size = no.of.sets* lines-per-set* block-size Let us assume no of sets = 2^x And block size= 2^y So applying it in formula. 2^19 = 2^x + 8 + 2^y; So x+y = 16 Now we know that to address block size and set number we need 16 bits so remaining bits must be for tag i.e., 40 - 16 = 24 The answer is 24 bits
If question extends and asks as what is the size of comparator, we need then it is 24 bit comparator.
The above explanation is contributed by Sumanth Sunny
Physical Address Bits = T(Tag Bits) + S(Set Bits) + O(Offset Bits) = 40 bits (given) Set = 8 (given) Size of cache = 512 KB (given) Size of lines = 512 / 8 = 64 KB So, O = 64/8 = 8 bits Now, S + O = 8 + 8 = 16 bits Hence, T = 40 - 16 = 24 bits
This explanation is contributed by Mohit Gupta. Refer the following links for more understanding in the above topic: Cache Memory Cache Organization | Introduction