GATE | GATE-CS-2004 | Question 63

Direction for questions 63 to 64: Consider the following program segment for a hypothetical CPU having three user registers R1, R2 and R3.

 Instruction 	 Operation 	 Instruction Size(in words)
 MOV R1,5000; 	 R1 ¬ Memory[5000] 	 2
 MOV R2, (R1); 	 R2 ¬ Memory[(R1)] 	 1
 ADD R2, R3; 	 R2 ¬ R2 + R3 	         1
 MOV 6000, R2; 	 Memory [6000] ¬ R2 	 2
 HALT 	         Machine halts 	         1 

Consider that the memory is byte addressable with size 32 bits, and the program has been loaded starting from memory location 1000 (decimal). If an interrupt occurs while the CPU has been halted after executing the HALT instruction, the return address (in decimal) saved in the stack will be