Consider the following circuit involving three D-type flip-flops used in a certain type of counter configuration.
If at some instance prior to the occurrence of the clock edge, P, Q and R have a value 0, 1 and 0 respectively, what shall be the value of PQR after the clock edge?
000
(B)001
010
(D)011
Answer:(D)
Explanation:
P\’ = R Q\’ = (P + R)\’ R\’ = QR\’ Given that (P, Q, R) = (0, 1, 0), next state P\’, Q\’, R\’ = 0, 1, 1 ———————————————————————————————– D flip flop truth table
D | Q(t+1) |
0 | 0 |
1 | 1 |
Initially (p,q,r) =(0,1,0) D for p=R D for q=NOT(p xor r) D for r= (not)r.q So Q(t+1) for(p,q,r) p=>r=0 so p=0 q=> NOT(p xor r) => 1 so q=1 r=>(not)r.q => 1 so r=1 (p, q, r) = (0, 1, 1) Alternative approach – Truth table of a D Flip-Flop-
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