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SIC/XE Architecture

SIC/XE stands for Simplified Instructional Computer Extra Equipment or Extra Expensive. This computer is an advance version of SIC. Both SIC and SIC/XE are closely related to each other that’s why they are Upward Compatible.

SIC/XE machine architecture:



1. Memory:

Memory consists of 8 bit-bytes and the memory size is 1 megabytes (220 bytes). Standard SIC memory size is very small. This change in the memory size leads to change in the instruction formats as well as addressing modes. 3 consecutive bytes form a word (24 bits) in SIC/XE architecture.

All address are byte addresses and words are addressed by the location of their lowest numbered byte.



2. Registers:
It contain 9 registers (5 SIC registers + 4 additional registers). Four additional registers are:


        Mnemonics             Use of Register
           B                  Base register
           S                  General working register
           T                  General working register
           F                  Floating-point accumulator

3. Data Formats:

4. Instruction formats:

Format 1(1 byte):

Format 2(2 bytes):

Format 3(3 bytes):

Format 4(4 bytes):

n=Indirect mode, i=Immediate addressing, x=Index addressing, b=Base addressing, p= Program counter, e=Exponential addressing

5. Addressing Modes:
To use Format 3 use of Base register and Program counter is there.

   
           Mode               Indication           Target Address (TA) 
           Base relative      b=1, p=0             TA=(B) + displacement 
           Program-counter    b=0, p=1             TA=(PC) + displacement 
           relative   

Target address is the effective address of the instruction.

6. Instruction Set:

7. Input and Output:
SIC/XE architecture include I/O channels that allow to perform I/O operations while CPU is executing other tasks. It will allow overlapping of computing and I/O, which make this architecture more efficient. Instructions such as SIO, TIO, HIO are used to start, test, and halt the operation I/O channels.

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