ISRO | ISRO CS 2007 | Question 46

Consider a small 2-way set-associative cache memory, consisting of four blocks. For choosing the block to be replaced, use the least recently (LRU) scheme. The number of cache misses for the
following sequence of block addresses is 8, 12, 0, 12, 8
(A) 2
(B) 3
(C) 4
(D) 5

Answer: (C)
Explanation: Refer: GATE-CS-2004 | Question 65

Option (C) is correct.

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