ASIC Full Form

ASIC stands for Application Specific Integrated Circuit. It is specially built for a specific application or purpose. If compared to any other device, ASIC has improved speed. Basically, it is an integrated circuit that’s been specified for one specific purpose and is not software programmable to perform a wide variety of different tasks. These are widely used in applications, including auto emission control, environmental monitoring, and personal digital assistants. It often has an embedded CPU to manage suitable tasks.

ASIC Categories

• Full – Custom ASICs
• Semi-Custom ASICs
• Programmable ICS

• Programmable: These are not custom made, and can be run in the data center, campus, or in a metro Ethernet environment. It is further subdivided into two categories.
  • FPGAs: These are complex and larger reconfigurable devices, which include programming logic cells and interconnect. For Example Xilinx, Altera, QuikLogic, etc are some of the FPGA companies
  • PLDs: These are the electronic devices used to build reconfigurable circuits. For Example- GAL ROM, PROM, EPROM, EEPROM, etc.
• Full Custom: These are custom-made from scratch for a specific application. It is a design methodology useful for integrated circuits. There are the resistors, transistors, digital logic, capacitors, and analog circuits are positioned in the circuit layout. For Example Microprocessor. It takes a minimum time of 8 weeks for normal manufacturing and is quite expensive. Features- Maximum performance, minimized area, and the highest degree of flexibility.
• Semi-Custom: These are customized partially so that they can perform the different functions within the area of their general application. Basically, it is an alternative to full-custom designs. It is further subdivided into two categories:
  • Gate Array Based: These have pre-defined transistors on the silicon wafer.
  • Standard Cell Based: Some logic gates such as AND gates, OR gates, multiplexers, flip-flops are pre-designed by designers by using different configurations, standardized, and stored in the form of a library, this is known as a standard cell library. The cell area or flexible block is made up of standard cells arranged in the form of rows,  with these flexible blocks mega cells like microcontrollers or even microprocessors are used on-chip. 

ASIC Design Flow Process

1. Chip Specification: In this step, an engineer defines features, microarchitectures, functionalities, and specifications along with the design guidelines of ASIC., 
2. Design Entry/Functional Verification: It confirms the functionality and logical behavior of the circuit.
3. RTL Synthesis: After the RTL code and testbench are generated, the team works on its description. After that, a database is created in the system.
4. Partitioning of chip: The structure is created using EDA tools and methodologies. Then, the structure is verified with High-Level Languages such as C++ or C.
5. Design for Test insertion: Techniques are introduced to find out the faults in the chips such as Scan path insertion, Memory BIST(built-in-Self Test), and ATPG(Automatic Test Pattern Generation).
6. Floor planning: The physical process is followed after step 5. Floor planning is done, which is the process of placing blocks in the chip, including block placement, design portioning, pin placement, and power optimization.
7. Placement Stage: It is the process of placing standard cells in a row. Also, this stage removes any time violations.
8. Clock tree synthesis: The clock tree is built in this process to meet the defined time and power as per the requirements.
9. Routing Stage: Routing is done in two stages to overcome complex challenges faced by engineers and to bring out better outcomes with less number of outcomes.
10. Final verification: After all these steps, the ASIC design layout undergoes three steps of physical verification i.e, Layout versus schematic, Design rule checks, and Logical equivalence checks.
11. GDS II: GDS II is the file produced after all these steps are completed and is used by the semiconductor foundries to fabricate the silicon and is handled by the client.

Applications

• This chip is used as an IP core for satellites, microcontrollers, and other various applications related to the medical and research sector.
• As mining cryptocurrency requires larger power and high-speed hardware, chips are called bitcoin miners. 

Advantages

• It has improved speed when compared to any other logic device.
• It is quite efficient.
• It reduces space requirements.
• There is a large reduction in size through the use of a high level of integration.
• Hyper-focused only on Mining.
• It has low power consumption.
• There are no timing issues or post-production configurations.

Disadvantages

• High initial development costs.
• Testing methods need to be developed which may increase the cost.
• It is not flexible.
• Not re-usable.
• Significant carbon footprint