OS Memory Management

Question 11

A computer system implements a 40 bit virtual address, page size of 8 kilobytes, and a 128-entry translation look-aside buffer (TLB) organized into 32 sets each having four ways. Assume that the TLB tag does not store any process id. The minimum length of the TLB tag in bits is _________

• 20
• 10
• 11
• 22

Question 12

Consider the virtual page reference string 1, 2, 3, 2, 4, 1, 3, 2, 4, 1 On a demand paged virtual memory system running on a computer system that main memory size of 3 pages frames which are initially empty. Let LRU, FIFO and OPTIMAL denote the number of page faults under the corresponding page replacements policy. Then

• OPTIMAL < LRU < FIFO
• OPTIMAL < FIFO < LRU
• OPTIMAL = LRU
• OPTIMAL = FIFO

Question 13

Let the page fault service time be 10ms in a computer with average memory access time being 20ns. If one page fault is generated for every 10^6 memory accesses, what is the effective access time for the memory?

• 21ns
• 30ns
• 23ns
• 35ns

Question 14

A system uses FIFO policy for page replacement. It has 4 page frames with no pages loaded to begin with. The system first accesses 100 distinct pages in some order and then accesses the same 100 pages but now in the reverse order. How many page faults will occur?

• 196
• 192
• 197
• 195

Question 15

In which one of the following page replacement policies, Belady’s anomaly may occur?

• FIFO
• Optimal
• LRU
• MRU

Question 16

The essential content(s) in each entry of a page table is / are

• Virtual page number
• Page frame number
• Both virtual page number and page frame number
• Access right information

Question 17

A multilevel page table is preferred in comparison to a single level page table for translating virtual address to physical address because

• It reduces the memory access time to read or write a memory location.
• It helps to reduce the size of page table needed to implement the virtual address space of a process.
• It is required by the translation lookaside buffer.
• It helps to reduce the number of page faults in page replacement algorithms.

Question 18

A processor uses 36 bit physical addresses and 32 bit virtual addresses, with a page frame size of 4 Kbytes. Each page table entry is of size 4 bytes. A three level page table is used for virtual to physical address translation, where the virtual address is used as follows 
• Bits 30-31 are used to index into the first level page table 
• Bits 21-29 are used to index into the second level page table 
• Bits 12-20 are used to index into the third level page table, and 
• Bits 0-11 are used as offset within the page 
The number of bits required for addressing the next level page table (or page frame) in the page table entry of the first, second and third level page tables are respectively.

• 20, 20 and 20

• 24, 24 and 24

• 24, 24 and 20

• 25, 25 and 24

Question 19

A virtual memory system uses First In First Out (FIFO) page replacement policy and allocates a fixed number of frames to a process. Consider the following statements: 

P: Increasing the number of page frames allocated to a 
   process sometimes increases the page fault rate.
Q: Some programs do not exhibit locality of reference. 

Which one of the following is TRUE?

• P is false, but Q is true
  

• Both P and Q are true, but Q is not the reason for P.
  

• Both P and Q are true, and Q is the reason for P
  

• Both P and Q are false
  

Question 20

A process has been allocated 3 page frames. Assume that none of the pages of the process are available in the memory initially. The process makes the following sequence of page references (reference string): 1, 2, 1, 3, 7, 4, 5, 6, 3, 1 If optimal page replacement policy is used, how many page faults occur for the above reference string?

• 7
• 8
• 9
• 10