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ISRO CS 2009

Question 11

Which of the following statements about synchronous and asynchronous I/O is NOT true?

  • An ISR is invoked on completion of I/O in synchronous I/O but not in asynchronous I/O

  • In both synchronous and asynchronous I/O, an ISR (Interrupt Service Routine) is invoked after completion of the I/O

  • A process making a synchronous I/O call waits until I/O is complete, but a process making an asynchronous I/O call does not wait for completion of the I/O

  • In the case of synchronous I/O, the process waiting for the completion of I/O is woken up by the ISR that is invoked after the completion of I/O

Question 12

Consider three CPU-intensive processes, which require 10, 20 and 30 time units and arrive at times 0, 2 and 6, respectively. How many context switches are needed if the operating system implements a shortest remaining time first scheduling algorithm? Do not count the context switches at time zero and at the end.
  • 1
  • 2
  • 3
  • 4

Question 13

The performance of Round Robin algorithm depends heavily on
  • size of the process
  • the I/O bursts of the process
  • the CPU bursts of the process
  • the size of the time quantum

Question 14

Consider a set of 5 processes whose arrival time, CPU time needed and the priority are given below:
Process       Arrival Time   CPU Time Needed     Priority
              (in ms)

P1              0             10                 5
P2              0             5                  2
P3              2             3                  1
P4              5             20                 4
P5              10            2                  3
(smaller the number, higher the priority) If the CPU scheduling policy is priority scheduling without preemption, the average waiting time will be
  • 12.8 ms
  • 11.8 ms
  • 10.8 ms
  • 9.8 ms

Question 15

The range of integers that can be represented by n bit 2’s complement number system is:
  • -2n-1 to (2n-1 - 1)
  • -(2n-1 - 1)to (2n-1 - 1)
  • -2n-1 to (2n-1 )
  • -(2n-1 + 1)to (2n-1 - 1)

Question 16

The switching expression corresponding to f (A,B,C,D) = Σ(1, 4, 5, 9, 11, 12) is:
  • BC\'D\' + A\'C\'D + AB\'D
  • ABC\' + ACD + B\'C\'D
  • ACD\' + A\'BC\' + AC\'D\'
  • A\'BD + ACD\' + BCD\'

Question 17

Consider the following boolean function of four variables, f (w, x, y,z) = Σ(1, 3, 4, 6, 9, 11, 12, 14], the function is
  • Independent of one variable
  • Independent of two variables
  • Independent of three variables
  • Dependent on all variables

Question 18

In which addressing mode, the effective address of the operand is generated by adding a constant value to the content of a register?
  • Absolute mode
  • Indirect mode
  • Immediate mode
  • Index mode

Question 19

A certain microprocessor requires 4.5 microseconds to respond to an interrupt. Assuming that the three interrupts I1, I2 and I3 require the following execution time after the interrupt is recognized: i. I1 requires 25 microseconds ii. I2 requires 35 microseconds iii. I3 requires 20 microseconds I1 has the highest priority and I3 has the lowest. What is the possible range of time for I3 to be executed assuming that it may or may not occur simultaneously with other interrupts?
  • 24.5 microseconds to 39.5 microseconds
  • 24.5 microseconds to 93.5 microseconds
  • 4.5 microseconds to 24.5 microseconds
  • 29.5 microseconds 93.5 microseconds

Question 20

The process of organizing the memory into two banks to allow 8 and 16-bit data operation is called
  • Bank switching
  • Indexed mapping
  • Two-way memory interleaving
  • Memory segmentation

There are 80 questions to complete.

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