Gate IT 2007

Question 31

Early binding refers to a binding performed at compile time and late binding refers to a binding performed at execution time. Consider the following statements:
i. Static scope facilitates w1 bindings.
ii. Dynamic scope requires w2 bindings.
iii. Early bindings w3 execution efficiency.
iv. Late bindings w4 execution efficiency.
The right choices of wl, w2, w3 and w4 (in that order) are

• Early, late, decrease, increase
• Late, early, increase, decrease
• Late, early, decrease, increase
• Early, late, increase, decrease

Question 32

The floating point unit of a processor using a design D takes 2t cycles compared to t cycles taken by the fixed point unit. There are two more design suggestions D1 and D2. D1 uses 30% more cycles for fixed point unit but 30% less cycles for floating point unit as compared to design D. D2 uses 40% less cycles for fixed point unit but 10% more cycles for floating point unit as compared to design D. For a given program which has 80% fixed point operations and 20% floating point operations, which of the following ordering reflects the relative performances of three designs?
(Di > Dj denotes that Di is faster than Dj)

• D1 > D > D2
• D2 > D > D1
• D > D2 > D1
• D > D1 > D2

Question 33

Consider a Direct Mapped Cache with 8 cache blocks (numbered 0-7). If the memory block requests are in the following order 3, 5, 2, 8, 0, 63, 9,16, 20, 17, 25, 18, 30, 24, 2, 63, 5, 82,17, 24. Which of the following memory blocks will not be in the cache at the end of the sequence ?

• 3
• 18
• 20
• 30

Question 34

The following expression was to be realized using 2-input AND and OR gates. However, during the fabrication all 2-input AND gates were mistakenly substituted by 2-input NAND gates.
(a.b).c + (a\'.c).d + (b.c).d + a. d
What is the function finally realized ?

• 1
• a\' + b\' + c\' + d\'
• a\' + b + c\' + d\'
• a\' + b\' + c + d\'

Question 35

Data forwarding techniques can be used to speed up the operation in presence of data dependencies. Consider the following replacements of LHS with RHS.

In which of the following options, will the result of executing the RHS be the same as executing the LHS irrespective of the instructions that follow ?

• (i) and (iii)
• (i) and (iv)
• (ii) and (iii)
• (ii) and (iv)
• Only (i)

Question 36

What is the final value stored in the linear feedback shift register if the input is 101101?

• 0110
• 1011
• 1101
• 1111

Question 37

Following table indicates the latencies of operations between the instruction producing the result and instruction using the result.

C

 Load R1, Loc 1;	 Load R1 from memory location Loc1
 Load R2, Loc 2;	 Load R2 from memory location Loc 2
 Add R1, R2, R1;	 Add R1 and R2 and save result in R1
 Dec R2;	 Decrement R2
 Dec R1;	 Decrement R1
 Mpy R1, R2, R3;	 Multiply R1 and R2 and save result in R3
 Store R3, Loc 3;	 Store R3 in memory location Loc 3

What is the number of cycles needed to execute the above code segment assuming each instruction takes one cycle to execute ?

• 7
• 10
• 13
• 14

Question 38

(C012.25)_H - (10111001110.101)_B =

• (135103.412)_o
• (564411.412)_o
• (564411.205)_o
• (135103.205)_o

Question 39

An error correcting code has the following code words: 
00000000, 00001111, 01010101, 10101010, 11110000.
What is the maximum number of bit errors that can be corrected ?

• 0
  

• 1
  

• 2
  

• 3
  

Question 40

A hard disk system has the following parameters :

• Number of tracks = 500
• Number of sectors/track = 100
• Number of bytes /sector = 500
• Time taken by the head to move from one track to adjacent track = 1 ms
• Rotation speed = 600 rpm.

What is the average time taken for transferring 250 bytes from the disk ?

• 300.5 ms
• 255.5 ms
• 255.0 ms
• 300.0 ms