Sequential circuits

Question 31

Consider the sequential circuit shown in the figure, where both flip-flops used are positive edge-triggered D flip-flops. The number of states in the state transition diagram of this circuit that have a transition back to the same state on some value of "in" is ______ . Note - This was Numerical Type question.

• 2

• 3

• 4

• None

Question 32

A binary 3-bit down counter uses J-K flip-flops, FF_i with inputs J_i, K_i and outputs Q_i, i = 0, 1, 2 respectively. The minimized expression for the input from following, is

• I, III, V

• I, IV, VI

• II, III, V

• II, IV, VI

Question 33

The functional difference between SR flip-flop and JK flip-flop is that

• JK Flip-flop is faster than SR flip-flop

• JK flip-flop has a feedback path

• JK flip-flop accepts both inputs 1

• none of them

Question 34

A modulus -12 ring counter requires a minimum of

• 10 flip-flops

• 12 flip-flops

• 8 flip-flops

• 6 flip-flops

Question 35

Consider the following sequential circuit What are the values of Q₀and Q₁ after 4 clock cycles if the initial values are 00 ?

• 11

• 01

• 10

• 00

Question 36

A ripple counter is a (n):

• Synchronous Counter

• Asynchronous counter

• Parallel counter

• None of the above

Question 37

In a positive-edge-triggered JK flip-flop, if J and K both are high then the output will be _____ on the rising edge of the clock.

• No change

• Set

• Reset

• Toggle

Question 38

Which of the following is a sequential circuit?

• Multiplexer

• Decoder

• Counter

• Full adder

Question 39

In a three stage counter, using RS flip flops what will be the value of the counter after giving 9 pulses to its input? Assume that the value of counter before giving any pulses is 1.

• 1

• 2

• 9

• 10

Question 40

In an RS flip-flop, if the S line (Set line) is set high (1) and the R line (Reset line) is set low (0), then the state of the flip-flop is

• Set to 1

• Set to 0

• No change in state

• Forbidden