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OS Memory Management

Question 31

In a system with 32 bit virtual addresses and 1 KB page size, use of one-level page tables for virtual to physical address translation is not practical because of
  • the large amount of internal fragmentation
  • the large amount of external fragmentation
  • the large memory overhead in maintaining page tables
  • the large computation overhead in the translation process

Question 32

Which of the following is NOT an advantage of using shared, dynamically linked libraries as opposed to using statically linked libraries ?

  • Smaller sizes of executable files

  • Lesser overall page fault rate in the system

  • Faster program startup

  • Existing programs need not be re-linked to take advantage of newer versions of libraries

Question 33

A processor uses 2-level page tables for virtual to physical address translation. Page tables for both levels are stored in the main memory. Virtual and physical addresses are both 32 bits wide. The memory is byte addressable. For virtual to physical address translation, the 10 most significant bits of the virtual address are used as index into the first level page table while the next 10 bits are used as index into the second level page table. The 12 least significant bits of the virtual address are used as offset within the page. Assume that the page table entries in both levels of page tables are 4 bytes wide. Further, the processor has a translation look-aside buffer (TLB), with a hit rate of 96%. The TLB caches recently used virtual page numbers and the corresponding physical page numbers. The processor also has a physically addressed cache with a hit rate of 90%. Main memory access time is 10 ns, cache access time is 1 ns, and TLB access time is also 1 ns. Assuming that no page faults occur, the average time taken to access a virtual address is approximately (to the nearest 0.5 ns)
  • 1.5 ns
  • 2 ns
  • 3 ns
  • 4 ns

Question 34

A processor uses 2-level page tables for virtual to physical address translation. Page tables for both levels are stored in the main memory. Virtual and physical addresses are both 32 bits wide. The memory is byte addressable. For virtual to physical address translation, the 10 most significant bits of the virtual address are used as index into the first level page table while the next 10 bits are used as index into the second level page table. The 12 least significant bits of the virtual address are used as offset within the page. Assume that the page table entries in both levels of page tables are 4 bytes wide. Further, the processor has a translation look-aside buffer (TLB), with a hit rate of 96%. The TLB caches recently used virtual page numbers and the corresponding physical page numbers. The processor also has a physically addressed cache with a hit rate of 90%. Main memory access time is 10 ns, cache access time is 1 ns, and TLB access time is also 1 ns. Suppose a process has only the following pages in its virtual address space: two contiguous code pages starting at virtual address 0x00000000, two contiguous data pages starting at virtual address 0×00400000, and a stack page starting at virtual address 0×FFFFF000. The amount of memory required for storing the page tables of this process is:
  • 8 KB
  • 12 KB
  • 16 KB
  • 20 KB

Question 35

Which of the following is not a form of memory?
  • instruction cache
  • instruction register
  • instruction opcode
  • translation lookaside buffer

Question 36

The optimal page replacement algorithm will select the page that
 

  • Has been used least number of times.
     

  • Will not be used for the longest time in the future.
     

  • Has not been used for the longest time in the past.
     

  • Has been used most number of times.
     

Question 37

Dynamic linking can cause security concerns because:
  • Security is dynamic
  • The path for searching dynamic libraries is not known till runtime
  • Linking is insecure
  • Cryptographic procedures are not available for dynamic linking

Question 38

Which of the following statements is false?
  • Virtual memory implements the translation of a program‘s address space into physical memory address space
  • Virtual memory allows each program to exceed the size of the primary memory
  • Virtual memory increases the degree of multiprogramming
  • Virtual memory reduces the context switching overhead

Question 39

The process of assigning load addresses to the various parts of the program and adjusting the code and date in the program to reflect the assigned addresses is called
  • Assembly
  • Parsing
  • Relocation
  • Symbol resolution

Question 40

Where does the swap space reside?
  • RAM
  • Disk
  • ROM
  • On-chip cache

There are 153 questions to complete.

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