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GATE CS 2013

Question 41

Consider the same data as above question. What is the minimum number of registers needed in the instruction set architecture of the processor to compile this code segment without any spill to memory? Do not apply any optimization other than optimizing register allocation.

  • 3

  • 4

  • 5

  • 6

Question 42

The procedure given below is required to find and replace certain characters inside an input character string supplied in array A. The characters to be replaced are supplied in array oldc, while their respective replacement characters are supplied in array newc. Array A has a fixed length of five characters, while arrays oldc and newc contain three characters each. However, the procedure is flawed
void find_and_replace(char *A, char *oldc, char *newc) {
    for (int i = 0; i < 5; i++)
       for (int j = 0; j < 3; j++)
           if (A[i] == oldc[j]) A[i] = newc[j];
}
The procedure is tested with the following four test cases (1) oldc = "abc", newc = "dab" (2) oldc = "cde", newc = "bcd" (3) oldc = "bca", newc = "cda" (4) oldc = "abc", newc = "bac" The tester now tests the program on all input strings of length five consisting of characters ‘a’, ‘b’, ‘c’, ‘d’ and ‘e’ with duplicates allowed. If the tester carries out this testing with the four test cases given above, how many test cases will be able to capture the flaw?
  • Only one
  • Only Two
  • Only Three
  • All Four

Question 43

In the above question, if array A is made to hold the string “abcde”, which of the above four test cases will be successful in exposing the flaw in this procedure?
  • None
  • 2 Only
  • 3 and 4 only
  • 4 only

Question 44

A computer uses 46-bit virtual address, 32-bit physical address, and a three-level paged page table organization. The page table base register stores the base address of the first-level table (T1), which occupies exactly one page. Each entry of T1 stores the base address of a page of the second-level table (T2). Each entry of T2 stores the base address of a page of the third-level table (T3). Each entry of T3 stores a page table entry (PTE). The PTE is 32 bits in size. The processor used in the computer has a 1 MB 16-way set associative virtually indexed physically tagged cache. The cache block size is 64 bytes. What is the size of a page in KB in this computer?
  • 2
  • 4
  • 8
  • 16

Question 45

Consider the same data as above question. What is the minimum number of page colours needed to guarantee that no two synonyms map to different sets in the processor cache of this computer?
  • 2
  • 4
  • 8
  • 16

Question 46

For the relation R(ABCDEFGH) with FD's= {CH->G, A->BC, B->CHF, E->A, F->EG such that F+ is exactly the set of FDs that hold for R.} Consider the FDs given in above question. The relation R is

  • in 1NF, but not in 2NF.

  • in 2NF, but not in 3NF.

  • in 3NF, but not in BCNF.

  • in BCNF

Question 47

Which one of the following options is the closest in meaning to the word given below? Nadir
  • Highest
  • Lowest
  • Medium
  • Integration

Question 48

Complete the sentence: Universalism is to particularism as diffuseness is to _________________
  • specificity
  • neutrality
  • generality
  • adaptation

Question 49

What will be the maximum sum of 44, 42, 40, ...... ?
  • 502
  • 504
  • 506
  • 500

Question 50

Choose the grammatically INCORRECT sentence:
  • He is of Asian origin.
  • They belonged to Africa.
  • She is an European.
  • They migrated from India to Australia.

There are 58 questions to complete.

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