GATE CS 2013

Question 31

A certain computation generates two arrays a and b such that a[i]=f(i) for 0 ≤ i < n and b[i]=g(a[i]) for 0 ≤ i < n. Suppose this computation is decomposed into two concurrent processes X and Y such that X computes the array a and Y computes the array b. The processes employ two binary semaphores R and S, both initialized to zero. The array a is shared by the two processes. The structures of the processes are shown below.

Process X:                         Process Y:
private i;                         private i;
for (i=0; i < n; i++) {            for (i=0; i < n; i++) {
   a[i] = f(i);                       EntryY(R, S);
   ExitX(R, S);                       b[i]=g(a[i]);
}                                 }

Which one of the following represents the CORRECT implementations of ExitX and EntryY? (A)

ExitX(R, S) {
  P(R);
  V(S);
}

EntryY (R, S) {
  P(S);
  V(R);
}

(B)

ExitX(R, S) {
  V(R);
  V(S);
}

EntryY(R, S) {
  P(R);
  P(S);
}

(C)

ExitX(R, S) {
  P(S);
  V(R);
}
EntryY(R, S) {
  V(S);
  P(R);
}

(D)

ExitX(R, S) {
  V(R);
  P(S);
}
EntryY(R, S) {
  V(S);
  P(R);
}

• A
• B
• C
• D

Question 32

Consider the following two sets of LR(1) items of an LR(1) grammar.

X -> c.X, c/d
   X -> .cX, c/d
   X -> .d, c/d
   X -> c.X, $
   X -> .cX, $
   X -> .d, $

Which of the following statements related to merging of the two sets in the corresponding LALR parser is/are FALSE?

1. Cannot be merged since look aheads are different.
2. Can be merged but will result in S-R conflict.
3. Can be merged but will result in R-R conflict.
4. Cannot be merged since goto on c will lead to two different sets.

• 1 only
• 2 only
• 1 and 4 only
• 1, 2, 3, and 4

Question 33

Which of the following is/are undecidable?

• 3 only
• 3 and 4 only
• 1, 2 and 3 only
• 2 and 3 only

Question 34

What is the return value of f(p,p), if the value of p is initialized to 5 before the call? Note that the first parameter is passed by reference, whereas the second parameter is passed by value.

CPP

int f(int &x, int c) {
   c = c - 1;
   if (c==0) return 1;
   x = x + 1;
   return f(x,c) * x;
}

• 3024
• 6561
• 55440
• 161051

Question 35

The preorder traversal sequence of a binary search tree is 30, 20, 10, 15, 25, 23, 39, 35, 42. Which one of the following is the postorder traversal sequence of the same tree?

• 10, 20, 15, 23, 25, 35, 42, 39, 30
• 15, 10, 25, 23, 20, 42, 35, 39, 30
• 15, 20, 10, 23, 25, 42, 35, 39, 30
• 15, 10, 23, 25, 20, 35, 42, 39, 30

Question 36

Which of the following is NOT a common operation in a queue data structure? 

• Enqueue 

• Dequeue 

• Peek 

• Shuffle 

Question 37

Consider an instruction pipeline with five stages without any branch prediction: Fetch Instruction (FI), Decode Instruction (DI), Fetch Operand (FO), Execute Instruction (EI) and Write Operand (WO). The stage delays for FI, DI, FO, EI and WO are 5 ns, 7 ns, 10 ns, 8 ns and 6 ns, respectively. There are intermediate storage buffers after each stage and the delay of each buffer is 1 ns. A program consisting of 12 instructions I1, I2, I3, …, I12 is executed in this pipelined processor. Instruction I4 is the only branch instruction and its branch target is I9. If the branch is taken during the execution of this program, the time (in ns) needed to complete the program is

• 132

• 165

• 176

• 328

Question 38

A RAM chip has a capacity of 1024 words of 8 bits each (1K × 8). The number of 2 × 4 decoders with enable line needed to construct a 16K × 16 RAM from 1K × 8 RAM is

• 4
• 5
• 6
• 7

Question 39

Which one of the following is NOT logically equivalent to ¬∃x(∀y(α)∧∀z(β))?

• ∀x(∃z(¬β)->∀y(α))

• ∀x(∀z(β)->∃y(¬α))

• ∀x(∀y(α)->∃z(¬β))

• ∀x(∃y(¬α)->∃z(¬β))

Question 40

The following code segment is executed on a processor which allows only register operands in its instructions. Each instruction can have atmost two source operands and one destination operand. Assume that all variables are dead after this code segment.

   c = a + b;
   d = c * a;
   e = c + a;
   x = c * c;
   if (x > a) {
      y = a * a;
   }
   else {
     d = d * d;
     e = e * e;
  }

Suppose the instruction set architecture of the processor has only two registers. The only allowed compiler optimization is code motion, which moves statements from one place to another while preserving correctness. What is the minimum number of spills to memory in the compiled code?

• 0
• 1
• 2
• 3