GATE-CS-2007

Question 71

Consider the following program segment. Here R1, R2 and R3 are the general purpose registers. Assume that the content of memory location 3000 is 10 and the content of the register R3 is 2000. The content of each of the memory locations from 2000 to 2010 is 100. The program is loaded from the memory location 1000. All the numbers are in decimal. Assume that the memory is word addressable. The number of memory references for accessing the data in executing the program completely is:

• 10
• 11
• 20
• 21

Question 72

Consider the data given in above question. Assume that the memory is word addressable. After the execution of this program, the content of memory location 2010 is:

• 100
• 101
• 102
• 110

Question 73

Consider the data given in above questions. Assume that the memory is byte addressable and the word size is 32 bits. If an interrupt occurs during the execution of the instruction “INC R3”, what return address will be pushed on to the stack?

• 1005
• 1020
• 1024
• 1040

Question 74

Consider the following Finite State Automaton. The language accepted by this automaton is given by the regular expression

• A
• B
• C
• D

Question 75

Consider the automata given in previous question. The minimum state automaton equivalent to the above FSA has the following number of states

• 1

• 2

• 3

• 4

Question 76

Consider the CFG with {S,A,B) as the non-terminal alphabet, {a,b) as the terminal alphabet, S as the start symbol and the following set of production rules

S --> aB        S --> bA
B --> b         A --> a
B --> bS        A --> aS
B --> aBB       A --> bAA

Which of the following strings is generated by the grammar?

• aaaabb
• aabbbb
• aabbab
• abbbba

Question 77

For the correct answer strings to below grammar, how many derivation trees are there?

[caption width="800"] [/caption]

• 1

• 2

• 3

• 4

Question 78

Consider a machine with a byte addressable main memory of 2¹⁶ bytes. Assume that a direct mapped data cache consisting of 32 lines of 64 bytes each is used in the system. A 50 × 50 two-dimensional array of bytes is stored in the main memory starting from memory location 1100H. Assume that the data cache is initially empty. The complete array is accessed twice. Assume that the contents of the data cache do not change in between the two accesses. How many data cache misses will occur in total?

• 40
• 50
• 56
• 59

Question 79

Consider the data given in above question. Which of the following lines of the data cache will be replaced by new blocks in accessing the array for the second time?

• line 4 to line 11
• line 4 to line 12
• line 0 to line 7
• line 0 to line 8

Question 80

A process has been allocated 3 page frames. Assume that none of the pages of the process are available in the memory initially. The process makes the following sequence of page references (reference string): 1, 2, 1, 3, 7, 4, 5, 6, 3, 1 If optimal page replacement policy is used, how many page faults occur for the above reference string?

• 7
• 8
• 9
• 10