Question 32
Question 33
Consider the following expressions P, Q and R. P: X = Y⋆Z Q: Y = X⋆Z R: X⋆Y⋆Z=1Which of the following is TRUE?
Question 34
Question 35
Pi = Ai ⨁ Bi and Gi = AiBiThe expressions for the sum bit Si and the carry bit Ci+1 of the look-ahead carry adder are given by:
Si = Pi ⨁ Ci and Ci+1 = Gi + PiCi , where C0 is the input carry.Consider a two-level logic implementation of the look-ahead carry generator. Assume that all Pi and Gi are available for the carry generator circuit and that the AND and OR gates can have any number of inputs. The number of AND gates and OR gates needed to implement the look-ahead carry generator for a 4-bit adder with S3, S2, S1, S0 and C4 as its outputs are respectively:
Question 36
The control signal functions of a 4-bit binary counter are given below (where X is “don’t care”) The counter is connected as follows:
The counter is connected as follows:
Assume that the counter and gate delays are negligible. If the counter starts at 0, then it cycles through the following sequence:
Question 37
IF: Instruction Fetch ID: Instruction Decode and Operand Fetch EX: Execute WB: Write BackThe IF, ID and WB stages take one clock cycle each to complete the operation. The number of clock cycles for the EX stage dependson the instruction. The ADD and SUB instructions need 1 clock cycle and the MUL instruction needs 3 clock cycles in the EX stage. Operand forwarding is used in the pipelined processor. What is the number of clock cycles taken to complete the following sequence of instructions?
ADD R2, R1, R0 R2 <- R0 + R1 MUL R4, R3, R2 R4 <- R3 * R2 SUB R6, R5, R4 R6 <- R5 - R4
Question 38
8 2 3 ^ / 2 3 * + 5 1 * -Note that ^ is the exponentiation operator. The top two elements of the stack after the first * is evaluated are:
Question 39
Question 40
There are 85 questions to complete.