• Courses
  • Tutorials
  • Jobs
  • Practice
  • Contests

GATE-CS-2007

Question 31

Which of the following languages is regular? 

  • {wwR|w ∈ {0,1}+

  • {wwRx|x,w∈{0,1}+}

  • {wxwR|x,w∈{0,1}+}

  • {xwwR|x,w∈{0,1}+}

Question 32

Let f(w, x, y, z) = ∑(0, 4, 5, 7, 8, 9, 13, 15). Which of the following expressions are NOT equivalent to f?
  • x\'y\'z\' + w\'xy\' + wy\'z + xz
  • w\'y\'z\' + wx\'y\' + xz
  • w\'y\'z\' + wx\'y\' + xyz + xy\'z
  • x\'y\'z\' + wx\'y\' + w\'y

Question 33

Define the connective * for the Boolean variables X and Y as: X * Y = XY + X\' Y\'. Let Z = X * Y.
Consider the following expressions P, Q and R.
P: X = Y⋆Z 
Q: Y = X⋆Z 
R: X⋆Y⋆Z=1
Which of the following is TRUE?
  • Only P and Q are valid
  • Only Q and R are valid.
  • Only P and R are valid.
  • All P, Q, R are valid.

Question 34

Suppose only one multiplexer and one inverter are allowed to be used to implement any Boolean function of n variables. What is the minimum size of the multiplexer needed?
  • 2n line to 1 line
  • 2n+1 line to 1 line
  • 2n-1 line to 1 line
  • 2n-2 line to 1 line

Question 35

In a look-ahead carry generator, the carry generate function Gi and the carry propagate function Pi for inputs Ai and Bi are given by:
Pi = Ai ⨁ Bi and Gi = AiBi 
The expressions for the sum bit Si and the carry bit Ci+1 of the look-ahead carry adder are given by:
Si = Pi ⨁ Ci and Ci+1 = Gi + PiCi , where C0 is the input carry. 
Consider a two-level logic implementation of the look-ahead carry generator. Assume that all Pi and Gi are available for the carry generator circuit and that the AND and OR gates can have any number of inputs. The number of AND gates and OR gates needed to implement the look-ahead carry generator for a 4-bit adder with S3, S2, S1, S0 and C4 as its outputs are respectively:
  • 6, 3
  • 10, 4
  • 6, 4
  • 10, 5

Question 36

The control signal functions of a 4-bit binary counter are given below (where X is “don’t care”) The counter is connected as follows: \"GATECS2007Q36\" 
The counter is connected as follows: 
\"GATECS2007Q36\" Assume that the counter and gate delays are negligible. If the counter starts at 0, then it cycles through the following sequence:

  • 0, 3, 4

  • 0, 3, 4, 5

  • 0, 1, 2, 3, 4

  • 0, 1, 2, 3, 4, 5

Question 37

Consider a pipelined processor with the following four stages:
IF: Instruction Fetch
ID: Instruction Decode and Operand Fetch
EX: Execute
WB: Write Back
The IF, ID and WB stages take one clock cycle each to complete the operation. The number of clock cycles for the EX stage dependson the instruction. The ADD and SUB instructions need 1 clock cycle and the MUL instruction needs 3 clock cycles in the EX stage. Operand forwarding is used in the pipelined processor. What is the number of clock cycles taken to complete the following sequence of instructions?
ADD R2, R1, R0       R2 <- R0 + R1
MUL R4, R3, R2       R4 <- R3 * R2
SUB R6, R5, R4       R6 <- R5 - R4  
  • 7
  • 8
  • 10
  • 14

Question 38

The following postfix expression with single digit operands is evaluated using a stack:
8 2 3 ^ / 2 3 * + 5 1 * - 
Note that ^ is the exponentiation operator. The top two elements of the stack after the first * is evaluated are:
  • 6, 1
  • 5, 7
  • 3, 2
  • 1, 5

Question 39

The inorder and preorder traversal of a binary tree are d b e a f c g and a b d e c f g, respectively. The postorder traversal of the binary tree is:
  • d e b f g c a
  • e d b g f c a
  • e d b f g c a
  • d e f g b c a

Question 40

Consider a hash table of size seven, with starting index zero, and a hash function (3x + 4)mod7. Assuming the hash table is initially empty, which of the following is the contents of the table when the sequence 1, 3, 8, 10 is inserted into the table using closed hashing? Note that ‘_’ denotes an empty location in the table.
  • 8, _, _, _, _, _, 10
  • 1, 8, 10, _, _, _, 3
  • 1, _, _, _, _, _,3
  • 1, 10, 8, _, _, _, 3

There are 85 questions to complete.

Last Updated :
Take a part in the ongoing discussion