UGC NET CS 2016 Aug – II

We have Boolean function: [~(~p ∧ q) ∧ ~( ~p ∧ ~q)] ∨ (p ∧ r)] = [(p ∨ ~q) ∧ (p ∨ q ) ∨ (p ∧ r)] = [p ∨ (p ∧ q) ∨ (p ∧ ~q) ∨(p ∧ r)] = p[1 ∨ q ∨ ~q ∨ r] = p So, option (D) is correct.

We have compound proposition (~ (p ∧ q)) ↔ (~ p ∨ ~ q): Now we will construct ordered tree: We are asked to determine pre-order (i.e. parent-node left-node right-node), we will drive it from ordered tree i.e. ↔ ~ ∧ p q ∨ ~ p ~q And post-order(i.e. left-node right-node parent-node) from the ordered tree it is p q ∧ ~ p ~ q ~ ∨ ↔. So, option (B) is correct.

We will draw venn diagram for all set: |A – B|, |A ⊕ B|, |A| + |B| and |A ∪ B| So, option (D) is correct. Alternative way -

|A – B| = |A| - |A ∩ B|
|A ⊕ B| = |A| + |B| - 2|A ∩ B|
|A ∪ B| = |A| + |B| - |A ∩ B|

Therefore,

|A – B| < |A ⊕ B| < |A ∪ B| < |A| + |B|

In the given question we have a palindrome: in even length palindrome half length is fixed and rest is repeated. So, in 10 bit palindrome, we have 5 position to be filled with 2 choices each- i.e. 2⁵ choices for first half and 2⁵ choices for second half.

Probability = favorable outcome / total outcome
     =  25/ 210
     =  1 / 25
     =  1 / 32.

So, option (B) is correct.

Euler circuit does not contain odd length cycle. Refer: Eulerian path and circuit for undirected graph None of the above graph is Eulerian. So, option (C) is correct.

To solve this question we will apply traditional approach: (326.4)₈ = 8² * 3 + 8¹ * 2 + 8⁰ * 6 . 8^-1 * 4 = ( 214.5)₁₀ is decimal representation. For hexadecimal representation group binary sequence of (214.5) = (011010110.100)2 into group of 4. i.e. 0 1101 0110. 1000 (0 can be padded after decimal) this is equivalent to- (D6.8)₁₆. So, option (C) is correct.

Sign's magnitude is only for sign convention (MSB is 1 then no is negative and if 0 then no is positive). Main difference is that while adding numbers using 1′ s complement, we first do binary addition, then add in an end-around carry value. But, 2′ s complement has only one value for zero, and doesn’t require carry values. 9’s complement of a decimal number is the subtraction of it’s each digits from 9. Like 1’s complement, 9’s complement is used to subtract a number using addition. 2's complement representation is unambiguous for 0 (i.e., only positive 0), but Sign-magnitude, 1’s complement and 9’s complement are ambiguous representation for 0 (i.e., both positive and negative 0). So, option (C) is correct.

By grouping we will simply get AB + AC + AD + BCD. So, option (B) is correct.

F is EXCLUSIVE-OR between X and Y. So, option (A) is correct.

Controlled Inverter is a circuit that transmits a binary word or its 1’s complement. Full adder is a circuit that can add 3 bits. Half adder is a logic circuit that adds 2 bits. Binary adder is a circuit that can add two binary numbers. So, option (D) is correct.