Quiz for Sudo GATE 2021

Question 31

In a computer laboratory all system are 14 bit and support 2KW memory. There are two types of instructions are placed in memory (one address and zero address). If there exist 5 one address instructions then how many zero address are possible? Note - This question is multiple select questions (MSQ).

• Total number of one address instructions are 8
• Total number of zero address instructions are 2028
• Total number of zero address instructions are 6144
• Total number of one address instructions are 10

Question 32

For inclusion to hold between two cache levels L1 and L2 in a multi-level cache hierarchy, which of the following is/are NOT necessary? Note - This question is multiple select questions (MSQ).

• L1 must be a write-through cache
• L2 must be a write-through cache
• The associativity of L2 must be greater than that of L1
• The L2 cache must be at least as large as the L1 cache

Question 33

An instruction is stored at location 300 with its address field at location 301. The address field has the value 400. A processor register R1 contains the number 200. Which of the following effective address is/are correct for addressing modes of the instruction? Note - This question is multiple select questions (MSQ).

• Direct effective address = 400
• Register indirect effective address = 200
• PC‐Relative effective address = 700
• Register indirect effective address = 600

Question 34

Which of the following option(s) is/are correct regarding addressing modes ? Note - This question is multiple select questions (MSQ).

• Direct addressing mode can move the data 45H immediately to register B.

• Implied addressing mode can find and store the 1’s complement of the contains of accumulator A in A.

• Register indirect addressing mode can move the contents of the memory location pointed by the H-L pair to the accumulator.

• Immediate addressing mode can load the contents of memory location into accumulator A.

Question 35

A computer responds to an interrupt request signal by pushing onto a full descending stack the contents of PC and the current PSW (program status word), assume that each one will need one word. It then reads a new PSW from memory from a location given by an interrupt address symbolized by IAD. The first address of the service program is taken from memory at location IAD+1. Note: TR (temporary register could be used). Consider the following statements: I. Sequence of micro-operations for the return from interrupt instruction:

SP ← SP-1
M[SP] ← PC
SP ← SP-1
M[SP] ← PSW
TR ← IAD
PSW ← M[TR]
TR ← TR + 1
PC ← M[TR]
Go to fetch phase. 

II. Sequence of micro-operations for the interrupt cycle:

PSW ← M[SP]
SP ← SP+1
PC ← M[SP]
SP ← SP+1

Which of the following option is correct? Note - This question is multiple select questions (MSQ).

• Statement I is correct.
• Statement II is correct.
• Statement I is not correct.
• Statement II is not correct.

Question 36

Which of the following option(s) is/are correct ? Note - This question is multiple select questions (MSQ).

• MD5 is vulnerable to the Birthday attack.
• traceroute uses the "Destination port unreachable" ICMP error message.
• 3DES is a type of Public Key Encryption Algorithm.
• None

Question 37

Which of the following option(s) is/are true? Note - This question is multiple select questions (MSQ).

• socket() creates a new socket of a certain socket type, identified by an integer number, and allocates system resources to it.
• bind() is typically used on the client side, and associates a socket with a socket address structure, i.e. a specified local port number and IP address.
• listen() is used on the server side, and causes a bound TCP socket to enter listening state.
• connect() is used on the client side, and assigns a free local port number to a socket.

Question 38

Which of the following option(s) is/are correct? Note - This question is multiple select questions (MSQ).

• HTTP is a stateless protocol.
• HTTP may use different TCP connections for different objects if a persistent connection is used.
• Checking mail in a browser is not HTTP process.
• Web browser uses HTTP to request a webpage.

Question 39

Which of the following is/are true regarding the number of cables in respective topology having n system? Note - This question is multiple select questions (MSQ).

• Mesh: n * (n - 1) / 2
• Star: n + 1
• Ring: n - 1
• Bus: n + 1

Question 40

Which of the following statement(s) is/are TRUE about the efficiency of the given channel? Note - This question is multiple select questions (MSQ).

• If we want to send big packets on the channel, then Stop and Wait is good choice.
• If length of packet increases, efficiency of channel also increases.
• Distance between sender and receiver is directly proportional to efficiency of channel.
• Efficient might be less if capacity of channel is high.