GATE CS 1999

Question 61

[5 Marks question] a.  Show that the formula [(~p ∨ q) ⇒ (q⇒ p)] is not a tautology. b.  Let A be a tautology and B be any other formula. Prove that (A ∨ B) is a tautology.    

Question 62

[5 Marks question] What will be the output of the following program assuming that parameter passing is (i) call by value (ii) call by reference (iii) call by copy restore

procedure P{x, y, z};
    begin y:y+1; z: x+x end; 
begin
    a:= b:= 3;
    P(a+b, a, a);
    Print(a) 
end.

Question 63

[5 Marks question] Consider the following pascal program skeleton:

program sort(...);
      var a,x,...;
      procedure readarray;
       var i,....;
       begin
                        ...:=a...
       end;
     procedure exchange(...);
       begin
                         ...:=a...
                         ...:=x...
       end;http://www.cdn.geeksforgeeks.org/wp-admin/profile.php
     procedure qsort(...);
       var k,v,...;
       function partition (...)...;
                var i,j,...;
                begin
                         ...:=a...
                         ...:=v...
                end;
        begin
            .
            .
        end;
   begin
        .
        .
   end;

Assume that at a given point in time during program execution, following procedures are active: sort, qsort(1,9), qsort(1.3), partition(1,3), exchange(1,3). Show snapshots of the runtime stack with access links after each of the activations.

Question 64

[5 Marks question] Consider the following program fragment in the assembly language of a certain hypothetical processor. The processor has three general purpose registers R1, R2 and R3. The meanings of the instructions are shown by comments (starting with ; ) after the instructions.

X:  CMP R1, 0   ;Compare R1 and 0, set flags appropriately in status register
    JZ  Z       ;Jump if zero to target Z
    MOV R2, R1  ;Copy contents of R1 to R2
    SHR R1      ;Shift right R1 by 1 bit
    SHL R1      ;Shift left R1 by 1 bit
    CMP R2, R1  ;Compare R2 and R1 and set flag in status register
    JZ  Y       ;Jump if zero to target Y
    INC R3      ;Increment R3 by 1;
Y:  SHR R1      ;Shift right R1 by 1 bit
    JMP X       ;Jump to target X
Z:...

a. Initially R1, R2 and R3 contain the value 5, 0 and 0 respectively. What are the final values of R1 and R3 when control reaches Z? b. In general, if R1, R2 and R3 initially contain the values n, 0 and 0 respectively. What is the final value of R3 when control reaches Z?

Question 65

[5 Marks question] Design a 2K x 8 (2048 locations, each 8 bit wide) memory system mapped at addresses (1000)₁₆ to (17FF)₁₆ for the 8085 processor using four 1K x 4 memory chips. Each of these chips has the following signal pins:

Question 66

[5 Marks question] A certain computer system has the segmented paging architecture for virtual memory. The memory is byte addressable. Both virtual and physical address spaces contain 216 bytes each. The virtual address space is divided into 8 non-overlapping equal size segments. The memory management unit (MMU) has a hardware segment table, each entry of which contains the physical address of the page table for the segments. Page tables are stored in the main memory and consists of 2 byte page table entries. a. What is the minimum page size in bytes so that the page table for a segment requires at most one page to store it? Assume that the page size can only be a power of 2. b. Now suppose that the pages size is 512 bytes. It is proposed to provide a TLB (Transaction look-aside buffer) for speeding up address translation. The proposed TLB will be capable of storing page table entries for 16 recently referenced virtual pages, in a fast cache that will use the direct mapping scheme. What is the number of tag bits that will need to be associated with each cache entry? c. Assume that each page table entry contains (besides other information) 1 valid bit, 3 bits for page protection and 1 dirty bit. How many bits are available in page table entry for storing the aging information for the page? Assume that the page size is 512 bytes.

Question 67

[5 Marks question] a. A certain processor provides a \'test and set\' instruction that is used as follows:

 TEST register, flag

This instruction atomically copies flag to register and sets flag to 1. Give pseudo-code for implementing the entry and exit code to a critical region using this instruction. b. Consider the following solution to the producer-consumer problem using a buffer of size 1. Assume that the initial value of count is 0. Also assume that the testing of count and assignment to count are atomic operations.

Producer:      
   Repeat 
       Produce an item;
       if count = 1 then sleep;
       place item in buffer.
       count = 1;
       Wakeup(Consumer);
  Forever 

Consumer:
  Repeat
      if count = 0 then sleep;
      Remove item from buffer;
      count = 0;
      Wakeup(Producer);
      Consume item;
  Forever;

Show that in this solution it is possible that both the processes are sleeping at the same time.

Question 68

[5 Marks question] Consider a B-tree with degree m, that is, the number of children, c, of any internal node (except the root) is such that m≤c≤2m-1. Derive the maximum and minimum number of records in the leaf nodes for such a B-tree with height h, h≥1. (Assume that the root of a tree is at height 0.)

Question 69

[5 Marks question] Consider the set of relations

EMP(Employee-no, Dept-no, Employee-name, Salary)
DEPT(Dept-no, Dept-name, Location)

Write an SQL query to: a. Find all employee names who work in departments located at "Calcutta" and whose salary is greater than Rs. 50,000. b. Calculate, for each department number, the number of employees with a salary greater than Rs. 100,000.

Question 70

Which of the following is correct?

• B-trees are for storing data on disk and B+ trees are for main memory.
• Range queries are faster on B+ trees.
• B-trees are for primary indexes and B+ trees are for secondary indexes.
• The height of a B+ tree is independent of the number of records.