Computer Organization and Architecture

Question 221

A computer uses ternary system instead of the traditional binary system. An n bit string in the binary system will occupy

• 3 + n ternary digits
• 2n / 3 ternary digits
• n(log₂3) ternary digits
• n(log₃2 ) ternary digits

Question 222

Micro program is

• the name of a source program in micro computers
• set of micro instructions that defines the individual operations in response to a machine-language instruction
• a primitive form of macros used in assembly language programming
• a very small segment of machine code

Question 223

Of the following, which best characterizes computers that use memory-mapped I/O?

• The computer provides special instructions for manipulating I/O ports
• I/O ports are placed at addresses on the bus and are accessed just like other memory locations
• To perform I/O operations, it is sufficient to place the data in an address register and call channel to perform the operation
• I/O can be performed only when memory management hardware is turned on

Question 224

A byte addressable computer has a memory capacity of 2^m KB( kbytes ) and can perform 2^m operations. An instruction involving 3 operands and one operator needs maximum of

• 3m bits
• 3m + n bits
• m + n bits
• none of the above

Question 225

A particular parallel program computation requires 100 sec when executed on a single processor. If 40% of this computation is inherently sequential (i.e. will not benefit from additional processors), then theoretically best possible elapsed times of this program running with 2 and 4 processors, respectively, are

• 20 sec and 10 sec
• 30 sec and 15 sec
• 50 sec and 25 sec
• 70 sec and 55 sec

Question 226

For a multi-processor architecture, In which protocol a write transaction is forwarded to only those processors that are known to possess a copy of newly altered cache line ?

• Snoopy bus protocol
• Cache coherency protocol
• Directory based protocol
• None of the above

Question 227

Normally user programs are prevented from handling I/O directly by I/O instructions in them. For CPUs having explicit I/O instructions, such I/O protection is ensured by having the I/O instructions privileged. In a CPU with memory mapped I/O, there is no explicit I/O instruction. Which one of the following is true for a CPU with memory mapped I/O ?

• I/O protection is ensured by operating system routines.
• I/O protection is ensured by a hardware trap.
• I/O protection is ensured during system configuration.
• I/O protection is not possible.

Question 228

CMOS is a Computer Chip on the motherboard, which is:

• RAM
• ROM
• EPROM
• Auxiliary storage

Question 229

Match the items in List - I and List - II:

codes:

List - I	List - II
(a)Interrupts which can be delayed when a much highest priority interrupt has occurred	(i)Normal
(b)Unplanned interrupts which occur while executing a program	(ii)Synchronous
(c)Source of interrupt is in phase with the system clock	(iii)Maskable
	(iv)Exception

	(a)	(b)	(c)
(1)	(ii)	(i)	(iii)
(2)	(ii)	(iv)	(iii)
(3)	(iii)	(i)	(ii)
(4)	(iii)	(iv)	(ii)

• (1)
• (2)
• (3)
• (4)

Question 230

Which of the following mapping is not used for mapping process in cache memory?

• Associative mapping
• Direct mapping
• Set-Associative mapping
• Segmented - page mapping