ISRO CS 2016

  • Last Updated : 07 Oct, 2020

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Question 1
Which of the following is true?
A
[TEX]\sqrt{3}+\sqrt{7}=\sqrt{10}[/TEX]
B
[TEX]\sqrt{3}+\sqrt{7}\leqslant \sqrt{10}[/TEX]
C
[TEX]\sqrt{3}+{\sqrt{7}< \sqrt{10}}[/TEX]
D
[TEX]\sqrt{3}+{\sqrt{7}> \sqrt{10}}[/TEX]
ISRO CS 2016    
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Question 2
A given connected graph is a Euler Graph if and only if all vertices of are of
A
same degree
B
even degree
C
odd degree
D
different degree
ISRO CS 2016    Graph Theory    
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Question 3
The maximum number of edges in a n-node undirected graph without self loops is
A
n2
B
n(n-1)/2
C
n-1
D
n(n+1)/2
ISRO CS 2016    Graph Theory    
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Question 4
The minimum number of NAND gates required to implement the Boolean function A + AB'+ AB'C is equal to
A
0
B
1
C
4
D
7
ISRO CS 2016    
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Question 4 Explanation: 
A + AB'+ AB'C
=A(1+B') + AB'C
=A + AB'C
=A(1+B'C)
=A
So, no extra gate is required. Correct option is (A)
Question 5
The minimum Boolean expression for the following circuit is:

A
AB + AC + BC
B
A + BC
C
A + B
D
A + B + C
ISRO CS 2016    
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Question 5 Explanation: 
We need to consider the different paths through which current can flow in this circuit by making the circuit complete.

These 3 paths exist and the expression will be:
A(B+C) + AB + (A+B)C
= AB + AC + AB + AC + BC
= AB + AC + BC.
So, option (A) is correct.
Question 6
For a binary half-subtractor having two inputs A and B, the correct set of logical expressions for the outputs D (= A minus B) and X (=borrow) are
A
D = AB + A'B , X = A'B
B
D = A'B + AB' , X = AB'
C
D = A'B + AB' , X = A'B
D
D = AB + A'B , X = AB'
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Question 6 Explanation: 
The Truth Table of half subtractor is:
A       B      OUTPUT       BORROW
0       0        0            0
0       1        1            1
1       0        1            0 
1       1        0            0
D = A'B + AB'
X = A'B
Option (D) is correct.
Question 7
Consider the following gate network

Which one of the following gates is redundant?
A
Gate No. 1
B
Gate No. 2
C
Gate No. 3
D
Gate No. 4
ISRO CS 2016    
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Question 7 Explanation: 
Output = w' + w'z + z'xy
= w'(1 + z) + z'xy
= w' + z'xy
From the expression, we can deduce that gate number 2 is redundant.
So, option (B) is correct.
Question 8
The dynamic hazard problem occurs in
A
combinational circuit alone
B
sequential circuit only
C
Both (a) and (b)
D
None of the above
ISRO CS 2016    Digital Logic & Number representation    Combinational Circuits    
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Question 9
The logic circuit given below converts a binary code into

A
Excess-3 code
B
Gray code
C
BCD code
D
Hamming Code
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Question 10
The circuit given below in the figure below is

A
An oscillating circuit and its output is square wave
B
The one whose output remains stable in '1' state
C
The one having output remains stable in '0' state
D
has a single pulse of three times propagation delay
ISRO CS 2016    Digital Logic & Number representation    Logic functions and Minimization    
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There are 72 questions to complete.
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