# Gate IT 2007

Question 1 |

Suppose there are two coins. The first coin gives heads with probability 5/8 when tossed, while the second coin gives heads with probability 1/4. One of the two coins is picked up at random with equal probability and tossed. What is the probability of obtaining heads ?

7/8 | |

1/2 | |

7/16 | |

5/32 |

**Gate IT 2007**

**Discuss it**

Question 1 Explanation:

Either 1st coin is selected or second coin is selected

Probability of 1st coin to be selected = ½

And probability of getting head on it = 5/8

Or

Probability of 2nd coin to be selected = 1/2

And pobability of getting head on 2nd coin = ¼

Probability of getting head (overall) = (Probability of selecting 1st coin * Probability of head on it) +(Probability of selecting 2nd coin * Probability of getting head on it) = (1/2)*(5/8) + (1/2)*(1/4) = 7/16

Probability of 1st coin to be selected = ½

And probability of getting head on it = 5/8

Or

Probability of 2nd coin to be selected = 1/2

And pobability of getting head on 2nd coin = ¼

Probability of getting head (overall) = (Probability of selecting 1st coin * Probability of head on it) +(Probability of selecting 2nd coin * Probability of getting head on it) = (1/2)*(5/8) + (1/2)*(1/4) = 7/16

Question 2 |

Let A be the . What is the maximum value of x

^{T}Ax where the maximum is taken over all x that are the unit eigenvectors of A?5 | |

(5 + √5)/2 | |

3 | |

(5 - √5)/2 |

**Gate IT 2007**

**Discuss it**

Question 2 Explanation:

|M-λ.I| = 0, where λ is the eigen values and I is the identity matrix

|A-(λ*I)| = 0

(3-λ)(2-λ)-1 = 0

6-3λ -2λ + λ

λ

λ = (5+√5)/2 and (5-√5)/2,

λ = (5+√5)/2 is max value another root with negative sign which will not be max value.

For, λ=5+5√2, x

For, λ=5−5√2, x

Hence, for λ=5+5√2 the value of x

|A-(λ*I)| = 0

(3-λ)(2-λ)-1 = 0

6-3λ -2λ + λ

^{2}+1=0λ

^{2}-5λ+5=0λ = (5+√5)/2 and (5-√5)/2,

λ = (5+√5)/2 is max value another root with negative sign which will not be max value.

For, λ=5+5√2, x

^{T}Ax=[18.131 21.231 21.231 34.331]For, λ=5−5√2, x

^{T}Ax=Hence, for λ=5+5√2 the value of x

^{T}Ax is maximum.Question 3 |

Consider a weighted undirected graph with positive edge weights and let uv be an edge in the graph. It is known that the shortest path from the source vertex s to u has weight 53 and the shortest path from s to v has weight 65. Which one of the following statements is always true?

weight (u, v) < 12 | |

weight (u, v) ≤ 12 | |

weight (u, v) > 12 | |

weight (u, v) ≥ 12 |

**Graph Shortest Paths**

**Graph Theory**

**Gate IT 2007**

**Discuss it**

Question 3 Explanation:

The minimum weight happens when (S,U) + (U,V) = (S,V)
Else (S,U) + (U,V) >= (S,V)
Given (S,U) = 53, (S,V) = 65
53 + (U,V) >= 63
(U,V) >= 12.
This solution is contributed by

**Anil Saikrishna Devarasetty**Question 4 |

In the Spiral model of software development, the primary determinant in selecting activities in each iteration is

Iteration size | |

Cost | |

Adopted process such as Rational Unified Process or Extreme Programming | |

Risk |

**Software Engineering**

**Gate IT 2007**

**Discuss it**

Question 4 Explanation:

Spiral model is used to discover all risks associated as early as possible.

Question 5 |

Which of the following systems is a most likely candidate example of a pipe and filter architecture ?

Expert system | |

DB repository | |

Aircraft flight controller | |

Signal processing |

**Computer Organization and Architecture**

**Gate IT 2007**

**Secondary memory and DMA**

**Discuss it**

Question 5 Explanation:

**Pipe and Filters**In the pipes and filters pattern, components are filters and connectors are pipes. Each filter takes input insome form and produces output in some other form, which may or may not be similar to the input form.Hopefully,each filter will add value to the output stream because of processing done inside the filter. Each filter is independent and is unaware of the up and down stream filters. Pipes are conduits of the data streams. Famous example of the pipes and filters architectural pattern are UNIX shells,signal processing systems and distributed systems.

Reference: Software Architecture: A Case Based Approach By Vasudeva Varma, Varma Vasudeva

Question 6 |

A processor takes 12 cycles to complete an instruction I. The corresponding pipelined processor uses 6 stages with the execution times of 3, 2, 5, 4, 6 and 2 cycles respectively. What is the asymptotic speedup assuming that a very large number of instructions are to be executed?

1.83 | |

2 | |

3 | |

6 |

**Computer Organization and Architecture**

**Gate IT 2007**

**Pipelining and Addressing modes**

**Discuss it**

Question 6 Explanation:

For non pipeline processor,

It takes, 12 cycles to complete 1 instruction

So, for n instructions it will take 12n cycle

For pipelined processor,

Each stage time = max{each stage cycles} = max{3, 2, 5, 4, 6 and 2} = 6 cycles

So, for n instructions it will take = 6*6+ (n-1)*6 {6*6 for 1st instruction and for rest of n-1 it will take 6}

For a large number of instructions:

Lim

It takes, 12 cycles to complete 1 instruction

So, for n instructions it will take 12n cycle

For pipelined processor,

Each stage time = max{each stage cycles} = max{3, 2, 5, 4, 6 and 2} = 6 cycles

So, for n instructions it will take = 6*6+ (n-1)*6 {6*6 for 1st instruction and for rest of n-1 it will take 6}

For a large number of instructions:

Lim

_{n->∞}12n/36 + (n-1)*6 = 12/6 =2Question 7 |

Which of the following input sequences for a cross-coupled R-S flip-flop realized with two NAND gates may lead to an oscillation ?

11, 00 | |

01, 10 | |

10, 01 | |

00, 11 |

**Digital Logic & Number representation**

**Gate IT 2007**

**Sequential circuits**

**Discuss it**

Question 7 Explanation:

RS flip flop using NAND gates. So, 00 input causes indeterminate state which MAY lead to oscillation.

Question 8 |

The following circuit implements a two-input AND gate using two 2-1 multiplexers. What are the values of X

_{1}, X_{2}, X_{3}?X _{1}=b, X_{2}=0, X_{3}=a | |

X _{1}=b, X_{2}=1, X_{3}=b | |

X _{1}=a, X_{2}=b, X_{3}=1 | |

X _{1}=a, X_{2}=0, X_{3}=b |

**Digital Logic & Number representation**

**Gate IT 2007**

**Combinational Circuits**

**Discuss it**

Question 9 |

Consider an ambiguous grammar G and its disambiguated version D. Let the language recognized by the two grammars be denoted by L(G) and L(D) respectively. Which one of the following is true ?

L (D) ⊂ L (G) | |

L (D) ⊃ L (G) | |

L (D) = L (G) | |

L (D) is empty |

**Regular languages and finite automata**

**Gate IT 2007**

**Discuss it**

Question 9 Explanation:

By changing grammar, language will not change here. {as converting NFA to DFA language will not be changed}

Question 10 |

Processes P

i. It is possible for both P

ii. This may lead to a deadlock.

Which of the following holds?

_{1}and P_{2}use critical_flag in the following routine to achieve mutual exclusion. Assume that critical_flag is initialized to FALSE in the main program.```
get_exclusive_access ( )
{
if (critical _flag == FALSE) {
critical_flag = TRUE ;
critical_region () ;
critical_flag = FALSE;
}
}
```

Consider the following statements.i. It is possible for both P

_{1}and P_{2}to access critical_region concurrently.ii. This may lead to a deadlock.

Which of the following holds?

(i) is false and (ii) is true | |

Both (i) and (ii) are false | |

(i) is true and (ii) is false | |

Both (i) and (ii) are true |

**OS Process Management**

**Deadlock**

**Gate IT 2007**

**Discuss it**

Question 10 Explanation:

Say P

_{1}starts first and executes statement 1, after that system context switches to P

_{2}(before executing statement 2), and it enters inside if statement, since the flag is still false. So now both processes are in critical section!! so (i) is true.. (ii) is false By no way it happens that flag is true and no process' are inside the if clause, if someone enters the critical section, it will definitely make flag = false. So no deadlock.

There are 80 questions to complete.