GATE-CS-2003
Question 71
The following program fragment is written in a programming language that allows variables and does not allow nested declarations of functions.
C
If the programming language uses static scoping and call by need parameter passing mechanism, the values printed by the above program are
global int i = 100, j = 5;
void P(x)
{
int i = 10;
print(x + 10);
i = 200;
j = 20;
print(x);
}
main()
{
P(i + j);
}
Question 72
The following program fragment is written in a programming language that allows variables and does not allow nested declarations of functions.
C
If the programming language uses dynamic scoping and call by name parameter passing mechanism, the values printed by the above program are :
global int i = 100, j = 5;
void P(x)
{
int i = 10;
print(x + 10);
i = 200;
j = 20;
print(x);
}
main()
{
P(i + j);
}
Question 73
Consider the following class definitions in a hypothetical Object Oriented language that supports inheritance and uses dynamic binding. The language should not be assumed to be either Java or C++, though the syntax is similar.
Class P
{
void f(int i)
{
print(i);
}
}
Class Q subclass of P
{
void f(int i)
{
print(2*i);
}
}
Now consider the following program fragment: P x = new Q(); Q y = new Q(); P z = new Q(); x.f(1); ((P)y).f(1); z.f(1);Here ((P)y) denotes a typecast of y to P. The output produced by executing the above program fragment will be
Question 74
Which of the following is NOT an advantage of using shared, dynamically linked libraries as opposed to using statically linked libraries ?
Question 75
A uni-processor computer system only has two processes, both of which alternate 10ms CPU bursts with 90ms I/O bursts. Both the processes were created at nearly the same time. The I/O of both processes can proceed in parallel. Which of the following scheduling strategies will result in the least CPU utilization (over a long period of time) for this system ?
Question 76
A processor uses 2-level page tables for virtual to physical address translation. Page tables for both levels are stored in the main memory. Virtual and physical addresses are both 32 bits wide. The memory is byte addressable. For virtual to physical address translation, the 10 most significant bits of the virtual address are used as index into the first level page table while the next 10 bits are used as index into the second level page table. The 12 least significant bits of the virtual address are used as offset within the page. Assume that the page table entries in both levels of page tables are 4 bytes wide. Further, the processor has a translation look-aside buffer (TLB), with a hit rate of 96%. The TLB caches recently used virtual page numbers and the corresponding physical page numbers. The processor also has a physically addressed cache with a hit rate of 90%. Main memory access time is 10 ns, cache access time is 1 ns, and TLB access time is also 1 ns.
Assuming that no page faults occur, the average time taken to access a virtual address is approximately (to the nearest 0.5 ns)
Question 77
A processor uses 2-level page tables for virtual to physical address translation. Page tables for both levels are stored in the main memory. Virtual and physical addresses are both 32 bits wide. The memory is byte addressable. For virtual to physical address translation, the 10 most significant bits of the virtual address are used as index into the first level page table while the next 10 bits are used as index into the second level page table. The 12 least significant bits of the virtual address are used as offset within the page. Assume that the page table entries in both levels of page tables are 4 bytes wide. Further, the processor has a translation look-aside buffer (TLB), with a hit rate of 96%. The TLB caches recently used virtual page numbers and the corresponding physical page numbers. The processor also has a physically addressed cache with a hit rate of 90%. Main memory access time is 10 ns, cache access time is 1 ns, and TLB access time is also 1 ns.
Suppose a process has only the following pages in its virtual address space: two contiguous code pages starting at virtual address 0x00000000, two contiguous data pages starting at virtual address 0×00400000, and a stack page starting at virtual address 0×FFFFF000. The amount of memory required for storing the page tables of this process is:
Question 78
Suppose we want to synchronize two concurrent processes P and Q using binary semaphores S and T. The code for the processes P and Q is shown below.
Process P:
while (1) {
W:
print \'0\';
print \'0\';
X:
}
Process Q:
while (1) {
Y:
print \'1\';
print \'1\';
Z:
}
Synchronization statements can be inserted only at points W, X, Y and Z.
Which of the following will always lead to an output starting with \'001100110011\' ?Question 79
Suppose we want to synchronize two concurrent processes P and Q using binary semaphores S and T. The code for the processes P and Q is shown below.
Process P:
while (1) {
W:
print \'0\';
print \'0\';
X:
}
Process Q:
while (1) {
Y:
print \'1\';
print \'1\';
Z:
}
Synchronization statements can be inserted only at points W, X, Y and Z
Which of the following will ensure that the output string never contains a substring of the form 01^n0 or 10^n1 where n is odd?Question 80
The subnet mask for a particular network is 255.255.31.0. Which of the following pairs of IP addresses could belong to this network?
There are 89 questions to complete.
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