GATE-CS-2002

Question 21

In 2\' s complement addition, overflow

• is flagged whenever there is carry from sign bit addition
• cannot occur when a positive value is added to a negative value
• is flagged when the carries from sign bit and previous bit match
• none of the above

Question 22

Which of the following scheduling algorithms is non-preemptive?

• Round Robin

• First-In First-Out

• Multilevel Queue Scheduling

• Multilevel Queue Scheduling with Feedback

Question 23

The optimal page replacement algorithm will select the page that

• Has been used least number of times.
  

• Will not be used for the longest time in the future.
  

• Has not been used for the longest time in the past.
  

• Has been used most number of times.
  

Question 24

In the absolute addressing mode

• the operand is inside the instruction
• the address of the operand is inside the instruction
• the register containing address of the operand is specified inside the instruction
• the location of the operand is implicit

Question 25

Maximum number of edges in a n - node undirected graph without self loops is

• n²
• n(n - 1)/2
• n - 1
• (n + 1) (n)/2

Question 26

Consider the following logic circuit whose inputs and function and output is f. Given that

f1(dx, y, z) = ∑(0, 1, 3, 5),
f2(dx, y, z) = ∑(6, 7) and
f(dx, y, z) = ∑(1, 4, 5),

f3 is :

• ∑(1, 4, 5)
• ∑(6, 7)
• ∑(0, 1, 3, 5)
• None of these

Question 27

Consider the following multiplexor where 10, 11, 12, 13 are four data input lines selected by two address line combinations A1A0 = 00, 01, 10, 11 respectively and f is "the output of the multiplexor. EN is the enable input. The function f(x, y, z) implemented by the above circuit is :

• xyz\'
• xy + z
• x + z
• None of these

Question 28

Let f(A, B) = A\' + B. Simplified expression for function f(f(x + y, y)z) is :

• x\' + z
• xyz
• xy\' + z
• None of these

Question 29

What are the states of the Auxiliary Carry (AC) and Carry Flag (dCY) after executing the following 8085 program?

   MVI L, 5DH
   MVI L, 6BH
   MOV A, H
   ADD L

• AC = 0 and CY = 0
• AC = 1 and CY = 1
• AC = 1 and CY = 0
• AC = 0 and CY = 0

Question 30

The Finite state machine described by the following state diagram with A as starting state, where an arc label is x / y and x stands for 1-bit input and y stands for 2- bit output

• Outputs the sum of the present and the previous bits of the input.
• Outputs 01 whenever the input sequence contains 11.
• Outputs 00 whenever the input sequence contains 10.
• None of these