Question 21
Question 22
Question 23
Question 24
S1 |
S2 |
S3 |
S4 |
|
I1 |
2 |
1 |
1 |
1 |
I2 |
1 |
3 |
2 |
2 |
I3 |
2 |
1 |
1 |
3 |
I4 |
1 |
2 |
2 |
2 |
Question 25
Question 26
I. It is useful in creating self-relocating code. II. If it is included in an Instruction Set Architecture, then an additional ALU is required for effective address calculation. III.The amount of increment depends on the size of the data item accessed.
Question 27
I. It must be a trap instruction II. It must be a privileged instruction III. An exception cannot be allowed to occur during execution of an RFE instruction
Question 28
I. L1 must be a write-through cache II. L2 must be a write-through cache III. The associativity of L2 must be greater than that of L1 IV. The L2 cache must be at least as large as the L1 cache
Question 29
I. Bypassing can handle all RAW hazards. II. Register renaming can eliminate all register carried WAR hazards. III. Control hazard penalties can be eliminated by dynamic branch prediction.
Question 30
The use of multiple register windows with overlap causes a reduction in the number of memory accesses for
I. Function locals and parameters II. Register saves and restores III. Instruction fetches
There are 241 questions to complete.