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Frontend Developer Roadmap 2024
Frontend development means to design the face of a website or application. It involves working on the appearance of the website. Building interactive buttons, using images...
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ISRO | ISRO CS 2017 | Question 46
In a compact one dimensional array representation for lower triangular matrix (all elements above diagonal are zero) of size n x n, non zero elements of each row are store...
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ISRO
ISRO | ISRO CS 2017 | Question 45
Match the following and choose the correct answer in the order A, B, C A. Heap Construction p. O(n log n) B. Hash table construction with linear probing...
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ISRO
ISRO | ISRO CS 2017 | Question 44
A sorting technique is called stable if(A) If it takes O(n log n) time(B) It uses divide and conquer technique(C) Relative order of occurrence of non-distinct elements is ...
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ISRO
ISRO | ISRO CS 2017 | Question 43
Consider an instruction of the type LW R1, 20(R2) which during execution reads a 32 bit word from memory and stores it in a 32 bit register R1. The effective address of th...
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ISRO
ISRO | ISRO CS 2017 | Question 42
In designing a computer’s cache system, the cache block (or cache line) size is an important parameter. Which one of the following statements is correct in this context?(A...
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ISRO
ISRO | ISRO CS 2017 | Question 41
For a pipelines CPU with a single ALU, consider the following:A. The j + 1st instruction uses the result of jth instruction as an operandB. Conditional jump instructionC. ...
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ISRO
ISRO | ISRO CS 2017 | Question 41
Let M = 11111010 and N = 00001010 be two 8 bit two’s complement number. Their product in two’s complement is(A) 11000100(B) 10011100(C) 10100101(D) 11010101Answer: (A)Expl...
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ISRO
ISRO | ISRO CS 2017 | Question 40
Let M = 11111010 and N = 00001010 be two 8 bit two’s complement number. Their product in two’s complement is(A)11000100(B)10011100(C)10100101(D)11010101 Answer: (A)Explan...
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ISRO
ISRO | ISRO CS 2017 | Question 39
A computer with 32 bit word size uses 2s complement to represent numbers. The range of integers that can be represented by this computer is(A)–232 to 232(B)–231 to 232-1(C...
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ISRO
ISRO | ISRO CS 2017 | Question 38
A CPU has a 32 KB direct mapped cache with 128 byte block size. Suppose A is a 2 dimensional array of size 512×512 with elements that occupy 8 bytes each. Consider the cod...
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ISRO
ISRO | ISRO CS 2017 | Question 37
A two way set associative cache memory unit with a capacity of 16 KB is built using a block size of 8 words. The word length is 32 bits. The physical address space is 4 GB...
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ISRO
ISRO | ISRO CS 2017 | Question 36
Station A uses 32 byte packets to transmit messages to Station B using a sliding window protocol. The round trip time delay between A and B is 40 ms and the bottleneck ban...
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ISRO
ISRO | ISRO CS 2017 | Question 35
Consider the set of activities related to e-mailA : Send an e-mail from a mail client to mail serverB : Download e-mail headers from mail box and retrieve mails from serve...
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ISRO
ISRO | ISRO CS 2017 | Question 34
Generally TCP is reliable and UDP is not reliable. DNS which has to be reliable uses UDP because(A) UDP is slower(B) DNS servers has to keep connections(C) DNS requests ar...
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ISRO
ISRO | ISRO CS 2017 | Question 33
Assume that Source S and Destination D are connected through an intermediate router R. How many times a packet has to visit the network layer and data link layer during a ...
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