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GATE | CSE 2024 | Set 2 | Question 3
Consider a computer with a 4MHZ processor. If DMA controller can transfer 8 bytes in 1 cycle from a device to the main memory through cycle stealing at regular intervals. Which one of the following is the data transfer rate (in bit/sec) of the DMA controller it is 1% of the processor cycle used for DMA
(A)
2560000
(B)
256000
(C)
3200
(D)
32000
Answer
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