Digital Logic || 2017 MCQ || 2-mark || Module 4: Sequential Circuit

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The next state table of a 2-bit saturating up-counter is given below.

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IMG

The counter is built as a synchronous sequential circuit using T flip-flops. The expressions for T1 and T0 are [GATE 2017 ||SET 2||MCQ||2 Marks]

T1 = Q0Q1, T0 = Q'0Q'1

T1= Q'1Q0, T0= Q'1+ Q'0

T1= Q1+ Q0, T0= Q'1+ Q'0

T1= Q'1Q0, T0 = Q1+ Q0

This question is part of this quiz :

GATE|| Digital logic || Pyq (2010 to 2025),GATE || DIGITAL ELECTRONICS / LOGIC ||PYQ (2010 TO2025),GATE || DIGITAL LOGIC || SEQUENTIAL CIRCUIT || PYQ (2010 TO 2025 )
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