COA-2012-PYQs-MCQ-2-mark- MODULE.7COA

A computer has a 256 KByte, 4-way set associative, write-back data cache with a block size of 32 Bytes. The processor sends 32-bit addresses to the cache controller. Each cache tag directory entry contains, in addition to the address tag, 2 valid bits, 1 modified bit, and 1 replacement bit.

The number of bits in the tag field of an address is _________.
[GATE 2012|| MCQ || 2 marks]