COA-2011-PYQs-MCQ-2-mark- MODULE.7COA

An 8 KB direct-mapped write-back cache is organized as multiple blocks, each of size 32 bytes. The processor generates 32-bit addresses.

The cache controller maintains the tag information for each cache block, which includes:

1. 1 Valid bit
2. 1 Modified (dirty) bit
3. As many tag bits as required to uniquely identify the memory block mapped to the cache
   What is the total size of memory needed at the cache controller to store meta-data (tags) for the cache?
   [GATE 2011 || MCQ || 2 marks]