What is CMOS FABRICATION(P-WELL PROCESS)?

CMOS means Complementary Metal Oxide Semiconductor. It is used to fabricate digital circuits and IC chips. It is a combination of NMOS (N-type Metal Oxide Semiconductor) and PMOS (P-type Metal Oxide Semiconductor) transistor pairs that are symmetrical. CMOS fabrication can be carried out in many ways. P-well is one of the processes in which CMOS circuits are realized.

Making of CMOS using P well Technology

The CMOS fabrication steps of the p-well process are the same as that of an n-well process except that instead of an n-well a p-well is implanted. the process starts with an n-type substrate. 

Step 1: A thin Sio2 layer is deposited on an n-type semiconductor material which acts insulator to the environment.

Step 2: Using chemical vapor deposition (CVD) the thick silicon nitride(si3No4) layer is deposited on the SIO2 layer.

Step 3: A plasma etching process is used to make trenches for insulating the device from the external environment.

Step 4: These trenches are filled with Sio2 which is called the field oxide which insulates the device.

Step 5: Using the mechanical planarization process the sacrificial nitride layer and the pad oxide are removed until the flat surface is on the layer.

Step 6: To adjust the doping process the p-well areas are exposed with masks and later annealing and implant are applied. This is followed by a second implant step to adjust the threshold voltage of the NMOS transistor.

Step 7: The implant step is performed to adjust the threshold voltage of the PMOS transistor.

Step 8: The metal contacts are made at the positions and the grounds are connected which prevents the device from high currents and voltages.

Step 9: Ion implantation is carried out at the source and drain regions of PMOS (p⁺) and NMOS (n⁺) transistors, this will also form the n⁺ polysilicon gate and p⁺ polysilicon gate for NMOS and PMOS transistors respectively. This process is also known as the self-aligned method.

Step 10: Oxide and Nitride spacers are formed by the chemical vapor deposition.

Step 11: Holes are etched, metal is deposited, and patterned. After the deposition of the last metal layer final over-glass is deposited for protection.

Significance of P well

• Consumes low power: P-well CMOS transistors consume low power and operate efficiently.
• Less sensitive: P-well CMOS devices are low sensitive that is they can withstand high currents and voltages
• Source to body not possible: Unlike n-well, the source to the body is not possible in p-well devices.
• Flexibility in manufacturing: P-well is mostly used CMOS type due to its flexibility in manufacturing.