Cache Miss occurs when data is not available in the Cache Memory. When the CPU detects a miss, it processes the miss by fetching requested data from main memory.
Types of Cache misses :
These are various types of cache misses as follows below.
- Compulsory Miss –
It is also known as cold start misses or first references misses. These misses occur when the first access to a block happens. Block must be brought into the cache.
- Capacity Miss –
These misses occur when the program working set is much larger than the cache capacity. Since Cache can not contain all blocks needed for program execution, so cache discards these blocks.
- Conflict Miss –
It is also known as collision misses or interference misses. These misses occur when several blocks are mapped to the same set or block frame.These misses occur in the set associative or direct mapped block placement strategies.
- Coherence Miss –
It is also known as Invalidation. These misses occur when other external processors, i.e., I/O updates memory.
Properties of these Cache misses :
These are various properties of Cache misses for same data set and various types of caches:
- Compulsory misses occur same in all types of direct mapped, set associative and associative caches.
- Coherence misses occur same in all types of direct mapped, set associative and associative caches.
- Conflict misses occur high in direct mapped cache, medium in set associative cache, and zero in associative mapped cache.
- Capacity misses occur low in direct mapped cache, medium in set associative cache, and high in associative mapped cache.
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