Timing diagram of MVI instruction

Problem – Draw the timing diagram of the following code,

MVI B, 45 

Explanation of the command – It stores the immediate 8 bit data to a register or memory location.

Example: MVI B, 45
Opcode: MVI
Operand: B is the destination register and 45 is the source data which needs to be transferred to the register.
’45’ data is stored in the B register.

Algorithm –

  • Decide what is the opcode and what is the data. Here, opcode is ‘MVI B’ and data is 45.
  • Assume the memory address of the opcode and the data. For example:
    MVI B, 45
    2000: Opcode
    2001: 45
  • The opcode fetch will be same in all the instructions.
  • Only the read instruction of the opcode needs to be added in the successive T states.
  • For the opcode read the IO/M (low active) = 0, S1 = 1 and S0 = 0. Also, only 3 T states will be required.
  • In Opcode fetch ( t1-t4 T states ) –

    • 00 – lower bit of address where opcode is stored, i.e., 00
    • 20 – higher bit of address where opcode is stored, i.e., 20.
    • ALE – Provides signal for multiplexed address and data bus. Only in t1 it used as address bus to fetch lower bit of address otherwise it will be used as data bus.
      RD (low active) – Signal is 1 in t1, t2 & t4, no data is read by microprocessor. Signal is 0 in t3, data is read by microprocessor.
      WR (low active) – Signal is 1 throughout, no data is written by microprocessor.
      IO/M (low active), S0 and S1 – Signal is 1 in throughout, operation is performing on input/output.

    In Opcode read ( t5-t7 T states ) –

    • 00 – lower bit of address where opcode is stored, i.e, 01
    • 20 – higher bit of address where opcode is stored, i.e, 20.
    • ALE – Provides signal for multiplexed address and data bus. Only in t5 it used as address bus to fetch lower bit of address otherwise it will be used as data bus.
      RD (low active) – Signal is 1 in t1, t2 & t4, no data is read by microprocessor. Signal is 0 in t3, data is read by microprocessor.
      WR (low active) – Signal is 1 throughout, no data is written by microprocessor.
      IO/M (low active) and S1 – Signal is 1 in throughout, operation is performing on input/output.
      S0 – Signal is 0 throughout, operation is performing on memory.


My Personal Notes arrow_drop_up

I like to do coding in C++C and java programming languages HTML and CSS always intersts me Sharing knowleged is the best way according to me to increase ones knwoledge

If you like GeeksforGeeks and would like to contribute, you can also write an article using contribute.geeksforgeeks.org or mail your article to contribute@geeksforgeeks.org. See your article appearing on the GeeksforGeeks main page and help other Geeks.

Please Improve this article if you find anything incorrect by clicking on the "Improve Article" button below.