Skip to content

Tag Archives: GATE-GATE-CS-2004

Mala has a colouring book in which each English letter is drawn two times. She wants to paint each of these 52 prints with one… Read More
An examination paper has 150 multiple-choice questions of one mark each, with each question having four choices. Each incorrect answer fetches -0.25 mark. Suppose 1000… Read More
The inclusion of which of the following sets into S = {{1, 2}, {1, 2, 3}, {1, 3, 5}, (1, 2, 4), (1, 2, 3,… Read More
The following is the incomplete operation table a 4-element group.  *  e  a  b  c  e  e  a  b  c  a  a  b  c  e… Read More
How many solutions does the following system of linear equations have ? -x + 5y = -1 x - y = 2 x + 3y… Read More
The following propositional statement is (P → (Q v R)) → ((P ^ Q) → R) (A) satisfiable but not valid (B) valid (C) a… Read More
A 4-stage pipeline has the stage delays as 150, 120, 160 and 140 nanoseconds respectively. Registers that are used between the stages have a delay… Read More
Let A = 1111 1010 arid B = 0000 1010 be two 8-bit 2’s complement numbers. Their product in 2’s complement is (A) 1100 0100… Read More
A hard disk with a transfer rate of 10 Mbytes/ second is constantly transferring data to memory using DMA. The processor runs at 600 MHz,… Read More
The microinstructions stored in the control memory of a processor have a width of 26 bits. Each microinstruction is divided into three fields: a micro-operation… Read More
Consider a small two-way set-associative cache memory, consisting of four blocks. For choosing the block to be replaced, use the least recently used (LRU) scheme.… Read More
Directions for question 63 to 64: Consider the following program segment for a hypothetical CPU having three user registers R1, R2 and R3. Instruction Operation… Read More
Direction for questions 63 to 64: Consider the following program segment for a hypothetical CPU having three user registers R1, R2 and R3. Instruction Operation… Read More
A 4-bit carry lookahead adder, which adds two 4-bit numbers, is designed using AND, OR, NOT, NAND, NOR gates only. Assuming that all the inputs… Read More
Consider the partial implementation of a 2-bitt counter using T flip-flops following the sequence 0-2-3-1-0, as shown below To complete the circuit, the input X… Read More