Parallel Random Access Machine, also called PRAM is a model considered for most of the parallel algorithms. It helps to write a precursor parallel algorithm without any architecture constraints and also allows parallel-algorithm designers to treat processing power as unlimited. It ignores the complexity of inter-process communication. PRAM algorithms are mostly theoretical but can be used as a basis for developing an efficient parallel algorithm for practical machines and can also motivate building specialized machines.
PRAM Architecture Model
The following are the modules of which a PRAM consists of:
- It consists of a control unit, global memory, and an unbounded set of similar processors, each with its own private memory.
- An active processor reads from global memory, performs required computation, and then writes to global memory.
- Therefore, if there are N processors in a PRAM, then N number of independent operations can be performed in a particular unit of time.
Parallel Random Access Machines
Models of PRAM
While accessing the shared memory, there can be conflicts while performing the read and write operation (i.e.), a processor can access a memory block that is already being accessed by another processor. Therefore, there are various constraints on a PRAM model which handles the read or write conflicts. They are:
- EREW: also called Exclusive Read Exclusive Write is a constraint that doesn’t allow two processors to read or write from the same memory location at the same instance.
- CREW: also called Concurrent Read Exclusive Write is a constraint that allows all the processors to read from the same memory location but are not allowed to write into the same memory location at the same time.
- ERCW: also called Exclusive Read Concurrent Write is a constraint that allows all the processors to write to the same memory location but are now allowed to read the same memory location at the same time.
- CRCW: also called Concurrent Read Concurrent Write is a constraint that allows all the processors to read from and write to the same memory location parallelly.
Example: Suppose we wish to add an array consisting of N numbers. We generally iterate through the array and use N steps to find the sum of the array. So, if the size of the array is N and for each step, let’s assume the time taken to be 1 second. Therefore, it takes N seconds to complete the iteration. The same operation can be performed more efficiently using a CRCW model of a PRAM. Let there be N/2 parallel processors for an array of size N, then the time taken for the execution is 4 which is less than N = 6 seconds in the following illustration.