Parallel processing approach diverges from traditional Von Neumann architecture. One such approach is the concept of Systolic processing using systolic arrays.
A systolic array is a network of processors that rhythmically compute and pass data through the system. They derived their name from drawing an analogy to how blood rhythmically flows through a biological heart as the data flows from memory in a rhythmic fashion passing through many elements before it returns to memory.It is also an example of pipelining along with parallel computing.It was introduced in 1970s and was used by Intel to make CMU’s iWarp processor in 1990.
In a systolic array there are a large number of identical simple processors or processing elements(PEs) that are arranged in a well organised structure such as linear or two dimensional array. Each processing element is connected with the other PEs and has a limited private storage.
A Host station is often used for communication with the outside world in the network.
- Parallel Computing –
Many processes are carried out simultaneously. As the arrays have a non-centralized structure, parallel computing is implemented.
- Pipelinability –
It means that the array can achieve high speed. It shows a linear rate pipelinability.
- Synchronous evaluation –
Computation of data is timed by a global clock and then the data is passed through the network.The global clock synchronizes the array and has fixed length clock cycles.
- Repetability –
Most of the arrays have the repetition and interconnection of a single type of PE in the entire network.
- Spatial Locality –
The cells have a local communication interconnection.
- Temporal Locality –
One unit time delay is at least required for the transmission of signals from one cell to another.
- Modularity and regularity –
A systolic array consists of processing units that are modular and have homogeneous interconnection and the computer network can be extended indefinitely.
Advantages of Systolic array –
- It employs high degree of parallelism and can sustain a very high throughput.
- These are highly compact, robust and efficient.
- Data and control flow are simple and regular.
Disadvantages of Systolic array –
- They are highly specialized and thus are inflexible regarding the problems they can solve.
- These are difficult to build.
- These are expensive.
- Hardware architecture (parallel computing)
- 8086 program to determine sum of corresponding elements of two arrays
- 8086 program to determine subtraction of corresponding elements of two arrays
- Introduction to Parallel Computing
- Difference between Cold Booting and Warm Booting
- Different Classes of CPU Registers
- Bit manipulation | Swap Endianness of a number
- Hardware Protection and Type of Hardware Protection
- Bare Machine and Resident Monitor
- Flash-Based SSD
- Log-Structured File System (LFS)
- Macro Processor
- Data Storage and its Sorts
- System Bus Design
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